公开(公告)号：DE602004004533D1

公开(公告)日：2007-03-15

申请号：DE602004004533

申请日：2004-09-30

Applicant: INFINEON TECHNOLOGIES AG

Inventor： HAN JONGHEE ,  KIM PILL

IPC: H03L7/081 ,  H03K5/00 ,  H03K5/13 ,  H03L7/06

Abstract: Techniques and circuit configurations for fine phase adjustments, for example, in a delay-locked loop (DLL) circuit are provided. Multiple phase signals may be generated from a single current source by selectively coupling one or more delay elements to an output node of the current source. The delay elements may vary the timing of a signal generated by switching the current source.

公开(公告)号：DE602004004533T2

公开(公告)日：2007-11-15

申请号：DE602004004533

申请日：2004-09-30

Applicant: INFINEON TECHNOLOGIES AG

Inventor： HAN JONGHEE ,  KIM PILL

IPC: H03L7/081 ,  H03K5/00 ,  H03K5/13 ,  H03L7/06

Abstract: Techniques and circuit configurations for fine phase adjustments, for example, in a delay-locked loop (DLL) circuit are provided. Multiple phase signals may be generated from a single current source by selectively coupling one or more delay elements to an output node of the current source. The delay elements may vary the timing of a signal generated by switching the current source.