中科微点-全球专利检索

  1. Login
  2. Sign Up

Search Results

44 records (took 0.025 seconds)

    TEST METHOD FOR A DATA MEMORY
    1.
    发明申请
    TEST METHOD FOR A DATA MEMORY 审中-公开
    测试程序的数据存储

    公开(公告)号：WO0154134A3

    公开(公告)日：2002-03-28

    申请号：PCT/EP0100295

    申请日：2001-01-11

    Applicant: INFINEON TECHNOLOGIES AG ,  PAUL STEFFEN ,  SCHOEBER VOLKER

    Inventor： PAUL STEFFEN ,  SCHOEBER VOLKER

    IPC: G11C29/44 ,  G11C29/00

    CPC classification number: G11C29/44

    Abstract: The invention relates to a test method for testing a data memory which comprises a main data memory (2) with a plurality of data memory units. According to the inventive method, the following steps are carried out for all data memory units: (a) addressing a data memory unit by applying the address of the data memory unit to a data bus linked with the main data memory (2); (b) applying the input test data for testing the addressed data memory unit to a data bus linked with the main data memory (2); (c) reading out the read-out test data from the addressed data memory unit; (d) comparing the output test data with the expected scheduled output test data; (e) writing the applied address into an address memory unit of an address memory (5) and the expected scheduled output test data into a pertaining redundancy data memory unit of a redundancy data memory (6) if the output test data and the expected scheduled output test data do not correspond.

    Abstract translation: 用于测试具有具有多个数据存储单元，其中，对于所有的数据存储单元中的以下步骤进行的主存储器（2）一个数据存储器试验方法：（a）以与主数据存储器将所述数据存储单元的地址的寻址的数据存储单元（2） 相关联的地址总线; （B）数据在相关联，用于被寻址的数据存储单元的测试输入的测试数据应用到主数据存储器（2）; （C）读出从被寻址的数据存储单元输出的测试数据; （D）比较预期标称输出的测试数据输出测试数据; （E）在冗余数据存储器中的相关联的冗余数据存储单元（6），当输出测试数据与预期标称输出测试数据不匹配写在一个地址存储器（5）和预期标称输出的测试数据的一个地址存储单元所施加的地址。

    METHODS AND DEVICES FOR DETECTING THE TRANSMIT DIVERSITY MODE FOR MOBILE RADIO RECEIVERS
    2.
    发明申请
    METHODS AND DEVICES FOR DETECTING THE TRANSMIT DIVERSITY MODE FOR MOBILE RADIO RECEIVERS 审中-公开
    方法和设备SEND分集模式为无线接收机检测

    公开(公告)号：WO2004040799A3

    公开(公告)日：2004-07-15

    申请号：PCT/DE0303553

    申请日：2003-10-24

    Applicant: INFINEON TECHNOLOGIES AG ,  PAUL STEFFEN ,  RUPRICH THOMAS

    Inventor： PAUL STEFFEN ,  RUPRICH THOMAS

    IPC: H04L1/06

    CPC classification number: H04L1/0618

    Abstract: According to a method and device (1) for carrying out TX diversity mode detection in a mobile radio receiver involving the use of a decision function, the decision function used for detecting the TX diversity mode is based on the coherent processing of two successive input signal data tuples {r(k);r(k+1 and {r(k+2);r(k+3 and on a detection of a phase offset between both tuples.

    Abstract translation: 在一种方法和用于发送分集模式检测的移动无线电接收器使用判决功能的装置（1），用于基于两个连续的输入信号数据元组{R（k）的相干处理检测到所述发送分集方式的决定功能 R（K + 1）}和{R（K + 2）中，r（K + 3）}，和检测的相位的两个元组之间的偏移的。

    REDUNDANT DATA MEMORY
    3.
    发明申请
    REDUNDANT DATA MEMORY 审中-公开
    冗余数据存储

    公开(公告)号：WO0153944A3

    公开(公告)日：2002-02-14

    申请号：PCT/EP0100075

    申请日：2001-01-05

    Applicant: INFINEON TECHNOLOGIES AG ,  PAUL STEFFEN ,  SCHOEBER VOLKER

    Inventor： PAUL STEFFEN ,  SCHOEBER VOLKER

    IPC: G11C29/00 ,  G06F11/20

    CPC classification number: G11C29/789 ,  G11C29/846

    Abstract: A data memory comprising a main data memory (2) consisting of a plurality of data memory units, a redundant data memory (3) consisting of several redundant data memory units which replace defective data memory units of the main data memory (2), and a redundant control logic (4) which is used to control access to the redundant data memory (4). The main data memory (2) and the redundant data memory (3) are connected in parallel to a data bus (6) by means of data lines (9,12). The main data memory (2) and the redundant control logic are connected in parallel to an address bus (7) by means of address lines (10,15) in order to address data memory units in the data memory (1).

    Abstract translation: 与由多个数据存储单元中的主数据存储装置（2），冗余数据存储器（3）由多个冗余数据存储单元中的用于替换的主数据存储器（2）的有故障的数据存储器单元，以及（具有冗余控制逻辑的一组数据存储器 4）连接，用于控制访问冗余数据存储器（3），其中，所述主数据存储装置（2）和平行经由数据线（9,12）中的冗余数据存储器（3）的数据总线（6），和 其中，所述主数据存储装置（2）和所述冗余控制逻辑平行于经由地址线彼此（10，15）（4）到地址总线（7），用于在所述数据存储器（1）的数据存储单元寻址连接。

    Empfänger und Verfahren zur Verarbeitung von Funksignalen
    4.
    发明专利
    Empfänger und Verfahren zur Verarbeitung von Funksignalen 未知

    公开(公告)号：DE102006053089B4

    公开(公告)日：2012-02-02

    申请号：DE102006053089

    申请日：2006-11-10

    Applicant: INFINEON TECHNOLOGIES AG

    Inventor： PAUL STEFFEN ,  ZIMMERMANN MANFRED ,  BUCHACHER CLEMENS

    IPC: H04B17/00 ,  H04B1/26 ,  H04B7/005 ,  H04B7/216

    Abstract: Empfänger (700; 800), umfassend: eine Bestimmungseinheit (701; 802), um ein Kanalprofil von empfangenen Funksignalen zu bestimmen, wobei das Kanalprofil die Verteilung der empfangenen Funksignale über eine Vielzahl von Übertragungspfaden angibt und jeder der Übertragungspfade einer Verzögerungszeit zugeordnet ist; einen Entzerrer (702; 806); mindestens einen Rake-Finger (703, 807); eine Steuereinheit (704; 803), um den Entzerrer (702; 806) auf erste Verzögerungszeiten zu platzieren und um den mindestens einen Rake-Finger auf mindestens eine zweite Verzögerungszeit zu platzieren; und ein FIR-Filter (900; 1000), wobei der Entzerrer (702; 806) und der mindestens eine Rake-Finger (703; 807) zumindest partiell im FIR-Filter (900; 1000) implementiert sind.

    7.
    发明专利
    未知

    公开(公告)号：DE10248052B4

    公开(公告)日：2009-12-24

    申请号：DE10248052

    申请日：2002-10-15

    Applicant: INFINEON TECHNOLOGIES AG

    Inventor： BECKER BURKHARD ,  PAUL STEFFEN ,  RUPRICH THOMAS

    IPC: H04B1/26 ,  H03H17/02 ,  H03H21/00 ,  H04B1/707 ,  H04B7/216 ,  H04L7/02

    Abstract: An apparatus for readjustment of a sampling time in a radio receiver includes a component for determination of any sampling time error in a discrete-value received signal that emits a sampling time error signal. A filter arrangement is provided that includes a multi-rate filter that filters the sampling time error signal. A correction element receives the discrete-value received signal and the filtered sampling time error signal, and emits a discrete-value received signal whose timing has been corrected in accordance with the sampling time error.

    8.
    发明专利
    未知

    公开(公告)号：DE10347985B4

    公开(公告)日：2005-11-10

    申请号：DE10347985

    申请日：2003-10-15

    Applicant: INFINEON TECHNOLOGIES AG

    Inventor： RUPRICH THOMAS ,  PAUL STEFFEN

    IPC: H04B7/04 ,  H04B7/06 ,  H04L1/02

    Abstract: The method involves producing two antenna-decoupled data streams in a receiver. For both data streams a respective size is calculated, dependent on the phase change between data in the respective data streams. The two sizes are evaluated for deciding, whether in the transmitter a multi-antenna transmission mode is used. An independent claim is included for a device for the recognition of a multi-antenna transmission mode.

    10.
    发明专利
    未知

    公开(公告)号：DE10023362C2

    公开(公告)日：2002-10-10

    申请号：DE10023362

    申请日：2000-05-12

    Applicant: INFINEON TECHNOLOGIES AG

    Inventor： WICHT BERNHARD ,  PAUL STEFFEN

    IPC: G11C7/06 ,  H04L25/52 ,  H03F1/56 ,  H03F1/52 ,  H03F3/72

    Abstract: An amplifier circuit configuration includes a data line for transmitting a data signal. The data line is connected to a data signal input of an amplifier by way of a switching device. The amplifier includes a control circuit for controlling an input resistance of the amplifier with a terminal for a control signal. The terminal for the control signal of the control circuit is connected, parallel to the switching device, to the data line. As a consequence, a switching device, which is connected between the data line and the amplifier, has only little influence on the dynamic response when reading out a data signal.

Patent Agency Ranking