3.
    发明专利
    未知

    公开(公告)号:DE102004055248B3

    公开(公告)日:2006-03-02

    申请号:DE102004055248

    申请日:2004-11-16

    Abstract: In order to form a contact in a layer on a substrate, in particular a contact in a logic circuit in a semiconductor component, the mask layer is structured for etching of the contact holes with a photoresist layer which is exposed using two masks, with the first mask containing a regular pattern of contact structures with a period which corresponds to the order of magnitude of twice the edge length of the contact hole, and with the second mask containing a pattern with a structure which surrounds at least the contact hole area, and thus covers it.

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