公开(公告)号：WO0199185A3

公开(公告)日：2002-03-28

申请号：PCT/US0119576

申请日：2001-06-19

Applicant: INFINEON TECHNOLOGIES CORP

Inventor： TEWS HELMUT HORST ,  LEE BRIAN S ,  MICHAELIS ALEXANDER ,  KUDLEKA STEPHAN ,  SCHROEDER UWE

IPC: H01L21/8242

CPC classification number: H01L27/10864 ,  H01L27/10876

Abstract: A method of forming a vertically-oriented device such as a DRAM storage all with a trench capacitor under a vertical transistor, using a selective wet etch to remove only a part of the sidewalls in a deep trench, and the device formed therefrom. While a poertion of the trench perimeter (e.g., isolation collar 304) is protected by a mask (e.g., polysilicon 318), the exposed portion is selectively wet etched to remove selected crystal planes from the exposed portion of the trench, leaving a flat substrate sidewall (324) with a single crystal plane. A single side vertical trench transistor may be formed on the flat sidewall. A vertical gate oxide (e.g. silicon dioxide 330) of the transistor formed on the single crystal plane is substantially uniform across the transistor channel, providing reduced chance of leakage and consistent threshold voltages from device to device. In addition, trench widening is substantially reduced, increasing the device to device isolation distance in a single sided buried strap junction device layout.

Abstract translation: 使用选择性湿法蚀刻仅在沟槽中除去一部分侧壁，以及由其形成的器件，在垂直晶体管下，用沟槽电容器形成诸如DRAM存储器的垂直取向器件的方法。 虽然沟槽周边（例如，隔离环304）的作用被掩模（例如，多晶硅318）保护，但是暴露部分被选择性地湿蚀刻以从沟槽的暴露部分移除所选择的晶面，留下平坦的基板 侧壁（324）与单晶面。 单侧垂直沟槽晶体管可以形成在平坦侧壁上。 形成在单晶平面上的晶体管的垂直栅极氧化物（例如二氧化硅330）在晶体管沟道上基本上是均匀的，从而降低了泄漏的机会和从器件到器件的一致的阈值电压。 此外，沟槽加宽大大降低，从而在单面掩埋带接合器件布局中将器件增加到器件隔离距离。