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公开(公告)号：US20240334838A1
公开(公告)日：2024-10-03
申请号：US18293846
申请日：2022-03-02
Inventor： Guozhong Xing , Long Liu , Xuefeng Zhao , Di Wang , Huai Lin , Hao Zhang , Ziwei Wang
CPC classification number: H10N50/10 , G11C5/063 , G11C11/161 , G11C11/1673 , G11C11/1675 , H10B61/20 , H10N50/20 , H10N50/85 , H10N52/101
Abstract: The present disclosure provides an SOT-MRAM memory cell, including: a bottom electrode; a magnetic tunnel junction layer located on the bottom electrode; an orbital Hall effect layer located on the magnetic tunnel junction layer; a first transistor, a drain of which is connected to the orbital Hall effect layer; and a second transistor, a drain of which is connected to the bottom electrode. The present disclosure further provides an SOT-MRAM memory, an operation method, and an SOT-MRAM memory array.
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2.发明申请公开(公告)号：US20250089577A1
公开(公告)日：2025-03-13
申请号：US18552786
申请日：2022-07-12
Inventor： Guozhong Xing , Hao Zhang , Xuefeng Zhao , Ziwei Wang , Changqing Xie , Ming Liu
IPC: H10N50/10 , H10B61/00 , H10N30/853 , H10N50/01 , H10N50/85
Abstract: The memory cell includes: a piezoelectric substrate layer, wherein two ends of the piezoelectric substrate layer are respectively provided with a first electrode and a second electrode, and a current-free drive of skyrmion is implemented by applying a voltage to the first electrode and the second electrode; a magnetic layer on a surface of the piezoelectric substrate layer, wherein the magnetic layer is used to form a heterojunction with the piezoelectric substrate layer, and is used to generate, stabilize, and serve as a basic carrier for a movement of the skyrmion; wherein the magnetic layer includes a convex body, the convex body is configured to divide the magnetic layer into a bit region and a memory region, and the bit region is provided with a magnetic tunnel junction used to perform generation and detection functions of the skyrmion.
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