公开(公告)号：US5814884C1

公开(公告)日：2002-01-29

申请号：US81682997

申请日：1997-03-18

Applicant: INT RECTIFIER CORP

Inventor： DAVIS CHRISTOPHER ,  CHEAH CHUAN ,  KINZER DANIEL M

IPC: H01L25/18 ,  H01L23/495 ,  H01L23/50 ,  H01L25/04 ,  H01L23/34 ,  H01L23/28 ,  H01L23/52 ,  H01L27/088 ,  H01L29/40

CPC classification number: H01L23/49562 ,  H01L23/49575 ,  H01L24/45 ,  H01L24/48 ,  H01L24/49 ,  H01L2224/0603 ,  H01L2224/45124 ,  H01L2224/45144 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L2224/48639 ,  H01L2224/48644 ,  H01L2224/48739 ,  H01L2224/48744 ,  H01L2224/49111 ,  H01L2224/85205 ,  H01L2224/85439 ,  H01L2224/85444 ,  H01L2924/01005 ,  H01L2924/01013 ,  H01L2924/01015 ,  H01L2924/01023 ,  H01L2924/01047 ,  H01L2924/01079 ,  H01L2924/014 ,  H01L2924/12032 ,  H01L2924/1306 ,  H01L2924/13091 ,  H01L2924/14 ,  H01L2924/181 ,  H01L2924/19041 ,  H01L2924/19042 ,  Y10S257/901 ,  H01L2924/00014 ,  H01L2924/00 ,  H01L2924/00012

公开(公告)号：WO03030216A3

公开(公告)日：2003-07-10

申请号：PCT/US0231111

申请日：2002-09-27

Applicant: INT RECTIFIER CORP

Inventor： ANDOH KOHJI ,  CHIOLA DAVIDE ,  KINZER DANIEL M

IPC: H01L27/08 ,  H01L21/00 ,  H01L31/00

CPC classification number: H01L27/0814 ,  H01L29/66143 ,  H01L29/8725

Abstract: A Schottky diode has a barrier height which is adjusted by boron implant through a titanium silicide 25 Schottky contact and into the underlying N- silicon substrate 49 which receives the titanium silicide contact. The implant is a low energy, of about 10 keV "non critical" and a low dose of less than about 1E12 atoms per cm2 "non-critical".

Abstract translation: 肖特基二极管具有通过硼注入通过硅化钛25肖特基接触并进入接收硅化钛接触的下面的N-硅衬底49中的势垒高度。 植入物是低能量，约10keV“非临界”，低剂量小于约1E12原子/ cm 2“非关键”。

公开(公告)号：WO2005079370A3

公开(公告)日：2006-06-15

申请号：PCT/US2005004615

申请日：2005-02-14

Applicant: INT RECTIFIER CORP ,  KINZER DANIEL M ,  BEACH ROBERT

Inventor： KINZER DANIEL M ,  BEACH ROBERT

IPC: H01L31/0328

CPC classification number: H01L29/7787 ,  H01L27/0605 ,  H01L29/2003 ,  H01L29/41758 ,  H01L29/42316

Abstract: A III-nitride bidirectional switch which includes an AlGaN/GaN interface that obtains a high current currying channel. The bidirectional switch operates with at least one gate that prevents or permits the establishment of a two dimensional electron gas to form the current carrying channel for the bidirectional switch.

Abstract translation: 一种III族氮化物双向开关，其包括获得高电流通道的AlGaN / GaN界面。 双向开关用至少一个栅极操作，该栅极防止或允许建立二维电子气体以形成用于双向开关的载流通道。

公开(公告)号：JP2000156503A

公开(公告)日：2000-06-06

申请号：JP29301599

申请日：1999-10-14

Applicant: INT RECTIFIER CORP

Inventor： KINZER DANIEL M

IPC: H01L21/336 ,  H01L29/06 ,  H01L29/417 ,  H01L29/423 ,  H01L29/78

Abstract: PROBLEM TO BE SOLVED: To simplify a manufacturing method, reduce a performance index as compared with a normal device, and to reduce costs by separating the contact between a source and a channel region from a trench region and using a polysilicon layer common to a plurality of adjacent trenches. SOLUTION: A plurality of rows of trenches 85 with a parallel, identical spread are etched to the surface of a substrate 81 up to the third depth that is deeper than the depth of P diffusion 82. As a result, the parallel trenches 85 are as deep as approximately 1.8 micron and are cut open through a source layer 83 and the channel layer 82. A region that is not trenched at the center of the surface of silicon when no first and second rows of the trench 95 are included is a region where the remote source/channel contact of the device for enabling an extremely narrow, high-density interval of the trench is accommodated. A conductive polysilicon layer 95 that functions as the gate of the device is filled to each inside of the gate oxide that is lined up with the trench. Also, the polysilicon layer 95 is isolated but is continuously extended across the upper surface of the substrate among trenches 85.

公开(公告)号：WO2005079293A3

公开(公告)日：2006-04-06

申请号：PCT/US2005004388

申请日：2005-02-14

Applicant: INT RECTIFIER CORP ,  KINZER DANIEL M ,  BEACH ROBERT

Inventor： KINZER DANIEL M ,  BEACH ROBERT

IPC: H01L31/072 ,  H01L21/336 ,  H01L27/06 ,  H01L29/20 ,  H01L29/872

CPC classification number: H01L29/872 ,  H01L27/0605 ,  H01L29/2003 ,  H01L29/41758 ,  H01L29/7786

Abstract: A III-nitride based integrated semiconductor device which includes at least two III-nitride based semiconductor devices formed in a common die.

Abstract translation: 一种III族氮化物基集成半导体器件，其包括形成在共用管芯中的至少两个III族氮化物基半导体器件。

公开(公告)号：WO2006004746A3

公开(公告)日：2006-02-16

申请号：PCT/US2005022917

申请日：2005-06-27

Applicant: INT RECTIFIER CORP ,  CAO JIANJUN ,  KENT DAVE ,  HARVEY PAUL ,  SODHI RITU ,  KINZER DANIEL M ,  THAPAR NARESH ,  SAWLE ANDREW N

Inventor： CAO JIANJUN ,  KENT DAVE ,  HARVEY PAUL ,  SODHI RITU ,  KINZER DANIEL M ,  THAPAR NARESH ,  SAWLE ANDREW N

IPC: H01L29/76

CPC classification number: H01L29/7813 ,  H01L21/823487 ,  H01L27/088 ,  H01L29/407 ,  H01L29/41766 ,  H01L29/66734 ,  H01L29/7397 ,  H01L29/7811

Abstract: A power semiconductor device which includes a source field electrode (30), and at least one insulated gate electrode (24, 26) adjacent a respective side of the source field electrode (30), the source field electrode (30) and the gate electrode being disposed in a common trench (10), and a method for fabricating the device.

Abstract translation: 一种功率半导体器件，其包括源极场电极（30）以及与源极场（30）的相应侧相邻的至少一个绝缘栅电极（24,26），源场电极（30）和栅电极 设置在公共沟槽（10）中，以及用于制造该器件的方法。

公开(公告)号：EP1258040A4

公开(公告)日：2009-07-01

申请号：EP01910483

申请日：2001-02-09

Applicant: INT RECTIFIER CORP

Inventor： KINZER DANIEL M ,  ARZUMANYAN ARAM ,  SAMMON TIM

IPC: H01L23/12 ,  H01L21/60 ,  H01L21/822 ,  H01L23/31 ,  H01L23/50 ,  H01L27/04 ,  H01L29/417 ,  H01L29/423 ,  H01L29/78 ,  H01L27/148 ,  H01L23/40 ,  H01L23/48 ,  H01L23/52 ,  H01L27/08 ,  H01L27/082 ,  H01L29/768 ,  H01L29/80

CPC classification number: H01L29/7813 ,  H01L23/3114 ,  H01L23/367 ,  H01L23/50 ,  H01L29/41741 ,  H01L29/4238 ,  H01L29/7809 ,  H01L2224/16 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/10253 ,  H01L2924/12032 ,  H01L2924/1301 ,  H01L2924/13034 ,  H01L2924/1305 ,  H01L2924/13055 ,  H01L2924/13091 ,  H01L2924/00 ,  H01L2924/00014

Abstract: A flip-chip MOSFET structure has a vertical conduction semiconductor die in which the lower layer of the die is connected to a drain electrode on the top of the die by a diffusion sinker or conductive electrode. The source and gate electrodes are also formed on the upper surface of the die and have coplanar solder balls for connection to a circuit board. The structure has a chip scale package size. The back surface of the die, which is inverted when the die is mounted may be roughened or may be metallized to improve removal of heat from the die. Several separate MOSFETs can be integrated side-by-side into the die to form a series connection of MOSFETs with respective source and gate electrodes at the top surface having solder ball connectors. Plural solder ball connectors may be provided for the top electrodes and are laid out in respective parallel rows. The die may have the shape of an elongated rectangle with the solder balls laid out symmetrically to a diagonal to the rectangle.

公开(公告)号：EP0777910A4

公开(公告)日：1998-10-07

申请号：EP95929600

申请日：1995-08-17

Applicant: INT RECTIFIER CORP

Inventor： KINZER DANIEL M

IPC: H01L21/28 ,  H01L21/265 ,  H01L21/332 ,  H01L21/336 ,  H01L21/768 ,  H01L29/10 ,  H01L29/41 ,  H01L29/417 ,  H01L29/739 ,  H01L29/744 ,  H01L29/749 ,  H01L29/78

CPC classification number: H01L29/66727 ,  H01L29/1095 ,  H01L29/41716 ,  H01L29/41766 ,  H01L29/66363 ,  H01L29/7396 ,  H01L29/7802

Abstract: A reduced mask process for forming a MOS gated device such as a power MOSFET uses a first mask (33) to sequentially form a cell body (50) and a source region (51) within the cell body (50), and a second mask step to form, by a silicon etch, a central opening (80,81) in the silicon surface at each cell and to subsequently undercut the oxide (60) surrounding the central opening (80,81). A contact layer (84) then fills the openings (80,81) of each cell to connect together the body (50) and source regions (51). Only one critical mask alignment step is used in the process.

公开(公告)号：JP2003115588A

公开(公告)日：2003-04-18

申请号：JP2002186923

申请日：2002-06-26

Applicant: INT RECTIFIER CORP

Inventor： KINZER DANIEL M ,  SRIDEVAN SRIKANT

IPC: H01L29/786 ,  H01L29/06 ,  H01L29/78

Abstract: PROBLEM TO BE SOLVED: To provide a new lateral conductive type superjunction MOSFET device. SOLUTION: Laterally extending trenches 20 to 23 are arranged at intervals in a P region. An N diffusion region is arranged along walls of trenches 20 to 23 so that the concentration and thickness of the N diffusion region and a P mesa are depleted fully during reverse blocking operation. The MOS gate structure is joined to one edge of the trenches 20 to 23 and the drain is connected to the other end of thereof. The other N layer or the insulting oxide layer can be arranged between the P substrate 11 and the P region 13.

公开(公告)号：JPH11354794A

公开(公告)日：1999-12-24

申请号：JP11709299

申请日：1999-04-23

Applicant: INT RECTIFIER CORP

Inventor： KINZER DANIEL M

IPC: H01L21/336 ,  H01L29/78

Abstract: PROBLEM TO BE SOLVED: To reduce loss by reducing ON resistance. SOLUTION: A low-voltage P-channel power MOSFET using trench technique has an N-channel region of a constant concentration that is deposited due to epitaxial growth while being adjacent to the side wall of a plurality of trenches. A channel region of a constant concentration is deposited on a P substrate and accepts a P source region at the upper portion of trenches 23 and 24. A source contact 40 is connected to both of source regions 30-33 and a channel region to become a uni-directional conductive device and is connected to only source regions 30-33 to become a bi-directional device.