公开(公告)号：WO0075966A3

公开(公告)日：2001-12-20

申请号：PCT/US0015808

申请日：2000-06-08

Applicant: INT RECTIFIER CORP

Inventor： QU ZHIJUN ,  WAGERS KENNETH

IPC: H01L21/331 ,  H01L29/08 ,  H01L29/78 ,  H01L29/76

CPC classification number: H01L29/66333 ,  H01L29/0878 ,  H01L29/7802

Abstract: The epitaxial silicon junction receiving layer of a power semiconductor device is formed of upper and lower layers. The lower layer has a resistivity of more than that of the upper layer and a thickness of more than that of the upper layer. The total thickness of the two layers is less than that of a single epitaxial layer that would be used for the same blocking voltage. P-N junctions are formed in the upper layer to define a vertical conduction power MOSFET device. The on-resistance is reduced more than 10 % without any blocking voltage reduce. The upper epitaxial layer can be either by direct second layer deposition or by ion implantation of a uniform epitaxial layer followed by a driving process.

Abstract translation: 功率半导体器件的外延硅结接收层由上层和下层形成。 下层的电阻率大于上层的电阻率，其厚度大于上层的电阻率。 两层的总厚度小于将用于相同阻挡电压的单个外延层的总厚度。 在上层形成P-N结以限定垂直导通功率MOSFET器件。 导通电阻降低10％以上，无阻塞电压降低。 上部外延层可以通过直接的第二层沉积或通过均匀外延层的离子注入，随后进行驱动过程。

公开(公告)号：JP2003158266A

公开(公告)日：2003-05-30

申请号：JP2002336979

申请日：2002-11-20

Applicant: INT RECTIFIER CORP

Inventor： WAGERS KENNETH ,  MA YANPING ,  CAO JIANJUN

IPC: H01L29/06 ,  H01L29/40 ,  H01L29/78

Abstract: PROBLEM TO BE SOLVED: To provide a termination for a MOS gate device, which uses a field plate and guard ring diffusions while reducing the area of a given chip or die. SOLUTION: Guard ring diffusions in the termination of a MOS gate device are laterally spaced from one another and are disposed beneath and are insulated from the termination field plate which extends from the periphery of the device active area.

公开(公告)号：GB2306249B

公开(公告)日：1999-11-17

申请号：GB9621156

申请日：1996-10-10

Applicant: INT RECTIFIER CORP

Inventor： KINZER DANIEL M ,  WAGERS KENNETH

IPC: H01L29/78 ,  H01L21/336 ,  H01L21/765 ,  H01L29/06 ,  H01L29/10 ,  H01L29/40 ,  H01L29/417

Abstract: A termination structure for semiconductor devices and a process for fabricating the termination structure are described which prevent device breakdown at the peripheries of the device. The termination structure includes a polysilicon field plate located atop a portion of a field oxide region and which, preferably, overlays a portion of the base region. The field plate may also extend slightly over the edge of the field oxide to square off the field oxide taper. The termination structure occupies minimal surface area of the chip and is fabricated without requiring additional masking steps.

公开(公告)号：ITMI962099A1

公开(公告)日：1998-04-10

申请号：ITMI962099

申请日：1996-10-10

Applicant: INT RECTIFIER CORP

Inventor： KINZER DANIEL M ,  WAGERS KENNETH

IPC: H01L29/78 ,  H01L21/336 ,  H01L21/765 ,  H01L29/06 ,  H01L29/10 ,  H01L29/40 ,  H01L29/417

Abstract: A termination structure for semiconductor devices and a process for fabricating the termination structure are described which prevent device breakdown at the peripheries of the device. The termination structure includes a polysilicon field plate located atop a portion of a field oxide region and which, preferably, overlays a portion of the base region. The field plate may also extend slightly over the edge of the field oxide to square off the field oxide taper. The termination structure occupies minimal surface area of the chip and is fabricated without requiring additional masking steps.

公开(公告)号：DE10252609A1

公开(公告)日：2003-05-28

申请号：DE10252609

申请日：2002-11-12

Applicant: INT RECTIFIER CORP

Inventor： WAGERS KENNETH ,  MA YANPING ,  CAO JIANJUN

IPC: H01L29/06 ,  H01L29/40 ,  H01L29/78

Abstract: Guard ring diffusions in the termination of a MOSgated device are laterally spaced from one another and are disposed beneath and are insulated from the termination field plate which extends from the periphery of the device active area.

公开(公告)号：GB2306249A

公开(公告)日：1997-04-30

申请号：GB9621156

申请日：1996-10-10

Applicant: INT RECTIFIER CORP

Inventor： KINZER DANIEL M ,  WAGERS KENNETH

IPC: H01L29/78 ,  H01L21/336 ,  H01L21/765 ,  H01L29/06 ,  H01L29/10 ,  H01L29/40 ,  H01L29/417

Abstract: A termination structure for semiconductor devices and a process for fabricating the termination structure are described which prevent device breakdown at the peripheries of the device. The termination structure includes a polysilicon field plate located atop a portion of a field oxide region and which, preferably, overlays a portion of the base region. The field plate may also extend slightly over the edge of the field oxide to square off the field oxide taper. The termination structure occupies minimal surface area of the chip and is fabricated without requiring additional masking steps.

公开(公告)号：FR2739976A1

公开(公告)日：1997-04-18

申请号：FR9612435

申请日：1996-10-11

Applicant: INT RECTIFIER CORP

Inventor： KINZER DANIEL M ,  WAGERS KENNETH

IPC: H01L29/78 ,  H01L21/336 ,  H01L21/765 ,  H01L29/06 ,  H01L29/10 ,  H01L29/40 ,  H01L29/417 ,  H01L21/334 ,  H01L21/328 ,  H01L29/68

Abstract: A termination structure for semiconductor devices and a process for fabricating the termination structure are described which prevent device breakdown at the peripheries of the device. The termination structure includes a polysilicon field plate located atop a portion of a field oxide region and which, preferably, overlays a portion of the base region. The field plate may also extend slightly over the edge of the field oxide to square off the field oxide taper. The termination structure occupies minimal surface area of the chip and is fabricated without requiring additional masking steps.

公开(公告)号：DE10252609B4

公开(公告)日：2018-02-08

申请号：DE10252609

申请日：2002-11-12

Applicant: INT RECTIFIER CORP

Inventor： WAGERS KENNETH ,  MA YANPING ,  CAO JIANJUN

IPC: H01L29/78 ,  H01L29/06 ,  H01L29/40

Abstract: Halbleiterbauteil mit MOS-Gatesteuerung, das durch einen aktiven Bereich und einen Abschlußbereich gebildet ist, wobei der aktive Bereich eine Vielzahl von Kanalbereichen und jeweiligen Source-Bereichen aufweist und der Abschlußbereich den Außenumfang des aktiven Bereiches umgibt und sich bis zur Kante des Halbleiterplättchens mit MOS-Gatesteuerung erstreckt, wobei das Halbleiterplättchen aus einem epitaxialen Silizium-Körper besteht, der auf einem Substrat gebildet ist, wobei das Halbleiterbauteil mit MOS-Gatesteuerung Folgendes umfasst: ein Feldoxyd, das die obere Oberfläche des Halbleiterplättchens bedeckt und sich von einer Position aus, die zumindest einen Teil der Kanalbereiche und den Außenumfang des aktiven Bereiches überlappt und in Richtung auf den Rand des Halbleiterplättchens erstreckt; eine leitende Polysilizium-Feldplatte, die über dem Feldoxyd und dem Außenumfang des aktiven Bereiches liegt und von dem aktiven Bereich durch das Feldoxyd isoliert ist; eine LTO-Schicht, die über zumindest einem Teil der Feldplatte und des aktiven Bereiches angeordnet ist; eine Polysilizium-Gate-Elektrode, die über einem invertierbaren Kanalbereich zwischen den Kanalbereichen und ihren jeweiligen Source-Bereichen liegt; eine metallische Source-Elektrode, die über zumindest einem Teil der LTO-Schicht angeordnet ist und mit den Kanalbereichen und den jeweiligen Source-Bereichen verbunden ist; eine metallische Gate-Anschluss-Elektrode, die über zumindest einen Teil der LTO-Schicht angeordnet ist und mit den Polysilizium-Gate-Elektroden verbunden ist, dadurch gekennzeichnet, dass die metallische Gate-Anschluss-Elektrode elektrisch mit der Polysilizium-Gate-Elektrode über die leitende Polysilizium-Feldplatte verbunden ist; und eine Vielzahl von mit radialem Abstand angeordneten Feldring-Diffusionen ausschließlich unterhalb der Feldplatte angeordnet ist, sodass der aktive Bereich vergrößert und damit der Einschaltwiderstand des Halbleiterbauteils mit MOS-Gatesteuerung verringert wird und gleichzeitig der spezifische Widerstand des epitaxialen Silizium-Körpers verringert wird.

公开(公告)号：DE10085499T5

公开(公告)日：2005-04-28

申请号：DE10085499

申请日：2000-06-08

Applicant: INT RECTIFIER CORP

Inventor： QU ZHIJUN ,  WAGERS KENNETH

IPC: H01L21/331 ,  H01L29/78

公开(公告)号：DE10159837A1

公开(公告)日：2003-06-26

申请号：DE10159837

申请日：2001-12-06

Applicant: INT RECTIFIER CORP

Inventor： QU ZHIJUN ,  WAGERS KENNETH

IPC: H01L21/331 ,  H01L29/08 ,  H01L29/78

Abstract: The power MOSFET device has two layers of epitaxial silicon with different concentration impurities. Several diffusions of conductive type opposing the epitaxial layer with greater impurity concentration are uniformly distributed into the surface of the epitaxial layer with greater impurity concentration to define p-n junctions. The epitaxial layer with lower impurity concentration is formed on top of the surface of a silicon substrate. Impurities of n or p conductivity type are uniformly distributed throughout the volume of the epitaxial layer on top of the silicon substrate. The other epitaxial layer is formed on the epitaxial layer on the silicon substrate.