公开(公告)号：JP2007183952A

公开(公告)日：2007-07-19

申请号：JP2006349813

申请日：2006-12-26

Applicant: Intel Corp ,  インテル コーポレイション

Inventor： NEIGER GILBERT ,  ANDERSON ANDREW V ,  BENNETT STEVEN M ,  MUDUKKARUMUKUMANA RAJESH SANKA ,  UHLIG RICHARD A ,  PARTHASARATHY RAJESH S ,  SCHOENBURG SEBASTIAN

IPC: G06F3/06

CPC classification number: G06F12/1441 ,  G06F12/145 ,  G06F2009/45587

Abstract: PROBLEM TO BE SOLVED: To provide a method, an apparatus and a system which achieve effective virtualization of resources in an information processing system. SOLUTION: The system is composed of an evaluation logic which determines whether or not an access is permitted based on its access type responding to an attempt of a guest who accesses a device using a memory address that is converted to the device, and an exit logic which transfers control of the apparatus from the guest to a host if the evaluation logic determined that the access is not permitted. COPYRIGHT: (C)2007,JPO&INPIT

Abstract translation: 要解决的问题：提供一种在信息处理系统中实现资源的有效虚拟化的方法，装置和系统。 解决方案：该系统由评估逻辑组成，该判定逻辑基于其访问类型来确定是否允许访问，该访问类型响应于使用转换为设备的存储器地址来访问设备的访客的尝试，以及 退出逻辑，如果评估逻辑确定不允许访问，则将装置的控制从客户转移到主机。 版权所有（C）2007，JPO＆INPIT

公开(公告)号：JP2013012252A

公开(公告)日：2013-01-17

申请号：JP2012230621

申请日：2012-10-18

Applicant: Intel Corp ,  インテル コーポレイション

Inventor： BENNETT STEVEN M ,  ANDERSON ANDREW V ,  GILBERT NEIGER ,  DION ROGERS ,  HUNTLEY BARRY E ,  SMITH LAWRENCE O

IPC: G06F9/46

CPC classification number: G06F9/45558 ,  G06F2009/45566

Abstract: PROBLEM TO BE SOLVED: To provide an apparatus, a method, and a system for installing a virtual event in a layered virtual architecture.SOLUTION: In one embodiment, an apparatus comprises: virtual machine entry logic; recognition logic; and evaluation logic. The virtual machine entry logic starts to transfer control of the apparatus from a host to a guest running on a virtual machine. The recognition logic recognizes a request from the host to install a virtual event into the virtual machine. The evaluation logic specifies an intervening monitor to handle the virtual event.

Abstract translation: 要解决的问题：提供一种用于在分层虚拟架构中安装虚拟事件的装置，方法和系统。 解决方案：在一个实施例中，一种装置包括：虚拟机进入逻辑; 识别逻辑; 和评估逻辑。 虚拟机入口逻辑开始将设备的控制从主机传送到在虚拟机上运行的guest虚拟机。 识别逻辑识别主机将虚拟事件安装到虚拟机中的请求。 评估逻辑指定一个中间监视器来处理虚拟事件。 版权所有（C）2013，JPO＆INPIT

公开(公告)号：JP2007183951A

公开(公告)日：2007-07-19

申请号：JP2006349810

申请日：2006-12-26

Applicant: Intel Corp ,  インテル コーポレイション

Inventor： NEIGER GILBERT ,  MUDUKKARUMUKUMANA RAJESH SANKA ,  UHLIG RICHARD A ,  STEINBERG UDO ,  SCHOENBURG SEBASTIAN ,  MUTHRASANALLUR SRIDHAR ,  BENNETT STEVEN M ,  ANDERSON ANDREW V ,  COTA-ROBLES ERIK C

IPC: G06F9/46 ,  G06F13/24

CPC classification number: G06F13/24 ,  G06F9/45533 ,  G06F9/4812

Abstract: PROBLEM TO BE SOLVED: To provide an apparatus, a method and a system which realize effective interrupt processing in a virtual environment. SOLUTION: The system is composed of an interface which receives an interrupt request while a guest is executed on a virtual processor, a transmission logic which determines whether or not the interrupt request is to be transmitted to the virtual processor based on attributes of the interrupt request, and an exit logic which moves control of the apparatus from the guest to a host if the transmission logic has determined that the interrupt request is not to be transmitted to the virtual processor. COPYRIGHT: (C)2007,JPO&INPIT

Abstract translation: 要解决的问题：提供一种在虚拟环境中实现有效的中断处理的装置，方法和系统。 解决方案：系统由在虚拟处理器上执行访客时接收中断请求的接口组成，发送逻辑根据以下属性确定中断请求是否要发送到虚拟处理器： 中断请求，以及如果传输逻辑已经确定中断请求不被发送到虚拟处理器，则将该设备的控制从客户端移动到主机的退出逻辑。 版权所有（C）2007，JPO＆INPIT

公开(公告)号：JP2011023000A

公开(公告)日：2011-02-03

申请号：JP2010153857

申请日：2010-07-06

Applicant: Intel Corp ,  インテル コーポレイション

Inventor： CHOBOTARO ARIE ,  RAPPOPORT RINAT ,  ANDERSON ANDREW V ,  CHAIKIN BARUCH

IPC: G06F12/10 ,  G06F9/46 ,  G06F12/08

CPC classification number: G06F9/45558 ,  G06F2009/45566 ,  G06F2009/45583

Abstract: PROBLEM TO BE SOLVED: To determine whether entries in a guest translation data structure have been modified by a virtual machine. SOLUTION: The determination is made based on metadata extracted from a shadow translation data structure maintained by a virtual machine monitor and attributes associated with entries in the shadow translation data structure. The method includes: synchronizing entries in the shadow translation data structure that correspond to the modified entries in the guest translation data structure with the modified entries in the guest translation data structure; and determining which entries to keep in the active entry list, based at least in part on attributes associated with corresponding entries in the shadow translation data structure identifying which of the plurality of processors owns each entry in the active entry list. COPYRIGHT: (C)2011,JPO&INPIT

Abstract translation: 要解决的问题：确定客人翻译数据结构中的条目是否已被虚拟机修改。 解决方案：基于从由虚拟机监视器维护的阴影翻译数据结构提取的元数据和与阴影翻译数据结构中的条目相关联的属性进行确定。 所述方法包括：使所述客体翻译数据结构中与所述修改的条目相对应的所述阴影翻译数据结构中的条目与所述客体翻译数据结构中的修改条目同步; 以及至少部分地基于与所述阴影翻译数据结构中的相应条目相关联的属性来确定要保留在所述活动条目列表中的条目，以识别所述多​​个处理器中的哪个处理器拥有所述活动条目列表中的每个条目。 版权所有（C）2011，JPO＆INPIT

公开(公告)号：JP2009015848A

公开(公告)日：2009-01-22

申请号：JP2008169354

申请日：2008-06-27

Applicant: Intel Corp ,  インテル コーポレイション

Inventor： BENNETT STEVEN M ,  ANDERSON ANDREW V ,  NEIGER GILBERT ,  RODGERS DION ,  HUNTLEY BARRY E ,  SMITH LAWRENCE O

IPC: G06F9/46

CPC classification number: G06F9/45558 ,  G06F2009/45566

Abstract: PROBLEM TO BE SOLVED: To provide an apparatus, method and system for installing a virtual event in a layered virtual architecture.
SOLUTION: In one embodiment, an apparatus includes virtual machine entry logic, recognition logic, and evaluation logic. The virtual machine entry logic starts to transfer control of the apparatus from a host to a guest running on a virtual machine. The recognition logic recognizes a request from the host to install a virtual event into the virtual machine. The evaluation logic specifies an intervening monitor to handle the virtual event.
COPYRIGHT: (C)2009,JPO&INPIT

Abstract translation: 要解决的问题：提供一种用于在分层虚拟架构中安装虚拟事件的装置，方法和系统。 解决方案：在一个实施例中，设备包括虚拟机入口逻辑，识别逻辑和评估逻辑。 虚拟机入口逻辑开始将设备的控制从主机传送到在虚拟机上运行的guest虚拟机。 识别逻辑识别主机将虚拟事件安装到虚拟机中的请求。 评估逻辑指定一个中间监视器来处理虚拟事件。 版权所有（C）2009，JPO＆INPIT

公开(公告)号：JP2010176693A

公开(公告)日：2010-08-12

申请号：JP2010061343

申请日：2010-03-17

Applicant: Intel Corp ,  インテル コーポレイション

Inventor： NEIGER GILBERT ,  MUDUKKARUMUKUMANA RAJESH SANKARAN ,  UHLIG RICHARD A ,  STEINBERG UDO ,  SCHOENBURG SEBASTIAN ,  MUTHRASANALLUR SRIDHAR ,  BENNETT STEVEN M ,  ANDERSON ANDREW V ,  COTA-ROBLES ERIK C

IPC: G06F9/48 ,  G06F9/46 ,  G06F13/24

CPC classification number: G06F13/24 ,  G06F9/45533 ,  G06F9/4812

Abstract: PROBLEM TO BE SOLVED: To provide apparatuses, methods, and systems for achieving effective interrupt processing in a virtualization environment. SOLUTION: An apparatus is provided which includes an interface to receive an interrupt request while a guest is made to run on a virtual processor, delivery logic for determining, based on the attribute of the interrupt request, whether the interrupt request is to be delivered to the virtual processor, and an exit logic for transferring control to a host from the guest when the delivery logic determines that the interrupt request is not to be delivered to the virtual processor. COPYRIGHT: (C)2010,JPO&INPIT

Abstract translation: 要解决的问题：提供在虚拟化环境中实现有效中断处理的设备，方法和系统。 解决方案：提供了一种装置，其包括接收中断请求的接口，同时使guest虚拟机在虚拟处理器上运行，用于根据中断请求的属性确定中断请求是否为 被递送到虚拟处理器，以及退出逻辑，用于当传递逻辑确定中断请求不被传送到虚拟处理器时，将控制从客户端传送到主机。 版权所有（C）2010，JPO＆INPIT

公开(公告)号：JP2008077642A

公开(公告)日：2008-04-03

申请号：JP2007211396

申请日：2007-08-14

Applicant: Intel Corp ,  インテル・コーポレーション

Inventor： BENNETT STEVEN M ,  ANDERSON ANDREW V ,  NEIGER GILBERT ,  UHLIG RICHARD ,  RODGERS DION ,  MADUKKARUMUKUMANA RAJESH ,  RUST CAMRON ,  SCHOENBERG SEBASTIAN

IPC: G06F12/10

CPC classification number: G06F12/1027 ,  G06F9/45558 ,  G06F12/0246 ,  G06F12/0875 ,  G06F12/1009 ,  G06F12/1036 ,  G06F12/1054 ,  G06F2009/45583 ,  G06F2212/152 ,  G06F2212/2022 ,  G06F2212/452 ,  G06F2212/50 ,  G06F2212/65 ,  G06F2212/657 ,  G06F2212/68 ,  G06F2212/683 ,  G06F2212/7201

Abstract: PROBLEM TO BE SOLVED: To reduce overhead in converting a guest physical address into a host physical address of a virtualization based system when a virtual machine executes guest software. SOLUTION: A processor includes a logic to execute an instruction to synchronize a mapping from a guest physical address of a virtualization based system to a host physical address of the virtualization based system, stored in a translation lookaside buffer (TLB) to a corresponding mapping stored in an extended paging table (EPT) based on the virtualization based system. COPYRIGHT: (C)2008,JPO&INPIT

Abstract translation: 要解决的问题：当虚拟机执行客户软件时，减少将访客物理地址转换为基于虚拟化的系统的主机物理地址的开销。 解决方案：处理器包括执行指令的逻辑，以使来自基于虚拟化的系统的来宾物理地址的映射与存储在翻译后备缓冲器（TLB）中的基于虚拟化的系统的主机物理地址同步到 基于虚拟化的系统，存储在扩展寻呼表（EPT）中的对应映射。 版权所有（C）2008，JPO＆INPIT

公开(公告)号：WO2005098616A2

公开(公告)日：2005-10-20

申请号：PCT/US2005010156

申请日：2005-03-25

Applicant: INTEL CORP ,  BENNETT STEVEN M ,  ANDERSON ANDREW V ,  COTA-ROBLES ERIK ,  JEYASINGH STALINSELVARAJ ,  KAGI ALAIN ,  NEIGER GILBERT ,  UHLIG RICHARD ,  MONDAL SANJOY K ,  BRANDT JASON

Inventor： BENNETT STEVEN M ,  ANDERSON ANDREW V ,  COTA-ROBLES ERIK ,  JEYASINGH STALINSELVARAJ ,  KAGI ALAIN ,  NEIGER GILBERT ,  UHLIG RICHARD ,  MONDAL SANJOY K ,  BRANDT JASON

IPC: G06F9/44 ,  G06F9/455 ,  G06F11/00 ,  G06F11/36

CPC classification number: G06F11/3664 ,  G06F9/45558 ,  G06F2009/45579 ,  G06F2009/45591

Abstract: In one embodiment, a method induces receiving a request to transition control to a virtual machine (VM) from a virtual machine monitor (VMM), determining that a single-stepping indicator is set to a single stepping value, and transitioning control to the VM. Further, if an execution of a first instruction in the VM completes successfully, control is transitioned to the VMM following the successful completion of the execution of the first instruction.

Abstract translation: 在一个实施例中，一种方法引起从虚拟机监视器（VMM）接收向虚拟机（VM）转换控制的请求，确定单步指示符被设置为单个步进值，并且将控制转换到VM 。 此外，如果VM中的第一指令的执行成功完成，则在成功完成第一指令的执行之后，将控制转换到VMM。

公开(公告)号：WO2006007361A3

公开(公告)日：2007-06-07

申请号：PCT/US2005020464

申请日：2005-06-09

Applicant: INTEL CORP ,  NEIGER GILBERT ,  ANDERSON ANDREW V ,  BENNETT STEVEN M ,  BRANDT JASON ,  COTA-ROBLES ERIK ,  JAYASINGH STALINSELVARAJ ,  KAEGI ALAIN ,  MONDAL SANJOY K ,  PARTHASARATHY RAJESH ,  RODGERS DION ,  SMITH LAWRENCE O ,  UHLIG RICHARD A

Inventor： NEIGER GILBERT ,  ANDERSON ANDREW V ,  BENNETT STEVEN M ,  BRANDT JASON ,  COTA-ROBLES ERIK ,  JAYASINGH STALINSELVARAJ ,  KAEGI ALAIN ,  MONDAL SANJOY K ,  PARTHASARATHY RAJESH ,  RODGERS DION ,  SMITH LAWRENCE O ,  UHLIG RICHARD A

IPC: G06F9/445

CPC classification number: G06F9/45533 ,  G06F11/0712 ,  G06F11/0775 ,  G06F11/0787 ,  G06F11/0793

Abstract: In one embodiment, information pertaining to a first fault occurring during operation of a virtual machine (VM) is stored in a first field. A second fault is detected while delivering the first fault to the VM, and a determination is made as to whether the second fault is associated with a transition of control to a virtual machine monitor (VMM). If this determination is positive, information pertaining to the second fault is stored in a second field, and control is transitioned to the VMM.

Abstract translation: 在一个实施例中，关于在虚拟机（VM）的操作期间发生的第一故障的信息被存储在第一字段中。 在向VM提供第一故障时检测到第二故障，并且确定第二故障是否与对虚拟机监视器（VMM）的控制转换相关联。 如果该确定是肯定的，则关于第二故障的信息被存储在第二字段中，并且控制被转换到VMM。

公开(公告)号：WO2013016345A2

公开(公告)日：2013-01-31

申请号：PCT/US2012047991

申请日：2012-07-24

Applicant: INTEL CORP ,  SANKARAN RAJESH M ,  KOKER ALTUG ,  LANTZ PHILIP ,  MALLICK ASIT K ,  CROSSLAND JAMES B ,  NAVALE ADITVA ,  NEIGER GILBERT ,  ANDERSON ANDREW V

Inventor： SANKARAN RAJESH M ,  KOKER ALTUG ,  LANTZ PHILIP ,  MALLICK ASIT K ,  CROSSLAND JAMES B ,  NAVALE ADITVA ,  NEIGER GILBERT ,  ANDERSON ANDREW V

IPC: G06F12/10 ,  G06F15/80

CPC classification number: G06F12/1027 ,  G06F12/1081 ,  G06F2212/1016 ,  G06F2212/1048 ,  G06F2212/303 ,  G06F2212/682 ,  G06F2212/683

Abstract: Methods and apparatus are disclosed for efficient TLB (translation look-aside buffer) shoot-downs for heterogeneous devices sharing virtual memory in a multi-core system. Embodiments of an apparatus for efficient TLB shoot-downs may include a TLB to store virtual address translation entries, and a memory management unit, coupled with the TLB, to maintain PASID (process address space identifier) state entries corresponding to the virtual address translation entries. The PASID state entries may include an active reference state and a lazy-invalidation state. The memory management unit may perform atomic modification of PASID state entries responsive to receiving PASID state update requests from devices in the multi-core system and read the lazy-invalidation state of the PASID state entries. The memory management unit may send PASID state update responses to the devices to synchronize TLB entries prior to activation responsive to the respective lazy-invalidation state.

Abstract translation: 公开了用于在多核系统中共享虚拟存储器的异构设备的有效TLB（转换后备缓冲器）击穿的方法和装置。 用于有效的TLB击倒的装置的实施例可以包括用于存储虚拟地址转换条目的TLB和与TLB耦合的存储器管理单元，以维护对应于虚拟地址转换条目的PASID（进程地址空间标识符）状态条目 。 PASID状态条目可以包括活动参考状态和惰性无效状态。 响应于从多核系统中的设备接收到PASID状态更新请求并且读取PASID状态条目的惰性无效状态，存储器管理单元可执行PASID状态条目的原子修改。 存储器管理单元可以在响应于相应的惰性无效化状态的激活之前向设备发送PASID状态更新响应以同步TLB条目。