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    Virtual to physical address translation with support for page attributes
    1.
    发明专利
    Virtual to physical address translation with support for page attributes 有权
    虚拟地址翻译支持页面属性

    公开(公告)号：JP2014067445A

    公开(公告)日：2014-04-17

    申请号：JP2013261239

    申请日：2013-12-18

    Applicant: Intel Corp ,  インテル コーポレイション

    Inventor： FALIK OHAD ,  BEN-ZION FRIEDMAN ,  DOWECK JACOB D ,  WEISSMANN ELIEZER ,  CROSSLAND JAMES B

    IPC: G06F12/10 ,  G06F12/08

    CPC classification number: G06F12/1009 ,  G06F12/10 ,  G06F12/1027 ,  G06F12/1036 ,  G06F2212/1016 ,  G06F2212/507 ,  G06F2212/65 ,  G06F2212/657 ,  G06F2212/68

    Abstract: PROBLEM TO BE SOLVED: To provide systems, methods, and apparatuses for virtual to physical address translation with support for page attributes.SOLUTION: A system receives an instruction to translate a virtual memory pointer to a physical memory address for a memory location; in address translation hardware, translates the virtual memory pointer to the physical memory address on the basis of page table information to produce a partial result of the instruction; and, as the result of the instruction, loads the physical memory address and one or more page attributes into one or more processor registers without accessing to a memory hierarchy.

    Abstract translation: 要解决的问题：提供用于虚拟到物理地址转换的系统，方法和装置，以支持页面属性。解决方案：系统接收将虚拟存储器指针转换为存储器位置的物理存储器地址的指令; 在地址转换硬件中，基于页表信息将虚拟存储器指针转换为物理存储器地址以产生指令的部分结果; 并且作为指令的结果，将物理存储器地址和一个或多个页面属性加载到一个或多个处理器寄存器中，而不访问存储器层次结构。

    Virtual address to physical address translation with support for page attribute
    2.
    发明专利
    Virtual address to physical address translation with support for page attribute 审中-公开
    虚拟地址到支持页面属性的物理地址翻译

    公开(公告)号：JP2008299844A

    公开(公告)日：2008-12-11

    申请号：JP2008135642

    申请日：2008-05-23

    Applicant: Intel Corp ,  インテル コーポレイション

    Inventor： FALIK OHAD ,  FRIEDMAN BEN-ZION ,  DOWECK JACOB D ,  WEISSMANN ELIEZER ,  CROSSLAND JAMES B

    IPC: G06F12/10 ,  G06F9/34

    CPC classification number: G06F12/1009 ,  G06F12/10 ,  G06F12/1027 ,  G06F12/1036 ,  G06F2212/1016 ,  G06F2212/507 ,  G06F2212/65 ,  G06F2212/657 ,  G06F2212/68

    Abstract: PROBLEM TO BE SOLVED: To return a physical memory address about a linear address given as an operand without typically giving additional information in the conventional address translation instruction. SOLUTION: This embodiment relates to a system, method and device for translating from a linear address to a physical address, with support for page attribute. In some embodiments, the system receives an instruction to translate a memory point to a physical memory address about a certain memory position. The system can return the physical memory address to one or a plurality of page attributes. Other embodiments are described and patent claim is made. COPYRIGHT: (C)2009,JPO&INPIT

    Abstract translation: 要解决的问题：返回关于作为操作数给出的线性地址的物理存储器地址，而不会在常规地址转换指令中通常给出附加信息。 解决方案：本实施例涉及一种用于从线性地址转换为物理地址并支持页面属性的系统，方法和设备。 在一些实施例中，系统接收将存储器点转换到关于某个存储器位置的物理存储器地址的指令。 该系统可以将物理存储器地址返回到一个或多个页面属性。 描述了其它实施例，并且进行了专利权利要求。 版权所有（C）2009，JPO＆INPIT

    Virtual to physical address translation instruction returning page attributes
    4.
    发明专利
    Virtual to physical address translation instruction returning page attributes 未知

    公开(公告)号：GB2449749A

    公开(公告)日：2008-12-03

    申请号：GB0809264

    申请日：2008-05-22

    Applicant: INTEL CORP

    Inventor： FALIK OHAD ,  FRIEDMAN BEN-ZION ,  DOWECK JACOB D ,  WEISSMANN ELIEZER ,  CROSSLAND JAMES B

    IPC: G06F12/10

    Abstract: A processor has an instruction to translate a virtual memory pointer to a physical memory address. The instruction returns the address and attributes associated with the page corresponding to the address. The translation may use a translation look aside buffer (TLB) or a page table. It may use the page table if the address is not in the TLB. The instruction may be used by a virtual machine manager to produce a host physical address. It may be used by a guest operating system to produce a guest physical memory address. The instruction may have an operand to define the context of the translation. The returned address may be stored in a dedicated register.

    6.
    发明专利
    未知

    公开(公告)号：DE102008025476A1

    公开(公告)日：2008-12-18

    申请号：DE102008025476

    申请日：2008-05-28

    Applicant: INTEL CORP

    Inventor： FALIK OHAD ,  FRIEDMAN BEN-ZION ,  DOWECK JACOB D ,  WEISSMANN ELIEZER ,  CROSSLAND JAMES B

    IPC: G06F12/10

    Abstract: Embodiments of the invention are generally directed to systems, methods, and apparatuses for linear to physical address translation with support for page attributes. In some embodiments, a system receives an instruction to translate a memory pointer to a physical memory address for a memory location. The system may return the physical memory address and one or more page attributes. Other embodiments are described and claimed.

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