公开(公告)号：DE112006001636T5

公开(公告)日：2008-05-08

申请号：DE112006001636

申请日：2006-06-30

Applicant: INTEL CORP

Inventor： TRIKA SANJEEV ,  FABERT ROBERT ,  COULSON RICK ,  MATTHEWS JEANNA

IPC: G06F12/02

Abstract: A technique includes performing a plurality of write operations to store data in different physical memory locations. Each of the physical memory locations are associated with a logical address that is shared in common among the physical addresses. The technique includes storing sequence information in the physical memory locations to indicate which one of the write operations occurred last.

公开(公告)号：GB2442162A

公开(公告)日：2008-03-26

申请号：GB0724745

申请日：2006-06-30

Applicant: INTEL CORP

Inventor： TRIKA SANJEEV ,  FABERT ROBERT ,  COULSON RICK ,  MATTHEWS JEANNA

IPC: G06F12/02

Abstract: A technique includes performing a plurality of write operations to store data in different physical memory locations. Each of the physical memory locations are associated with a logical address that is shared in common among the physical addresses. The technique includes storing sequence information in the physical memory locations to indicate which one of the write operations occured last.

公开(公告)号：GB2442162B

公开(公告)日：2010-09-15

申请号：GB0724745

申请日：2006-06-30

Applicant: INTEL CORP

Inventor： TRIKA SANJEEV ,  FABERT ROBERT ,  COULSON RICK ,  MATTHEWS JEANNA

IPC: G06F12/02

Abstract: A technique includes performing a plurality of write operations to store data in different physical memory locations. Each of the physical memory locations are associated with a logical address that is shared in common among the physical addresses. The technique includes storing sequence information in the physical memory locations to indicate which one of the write operations occurred last.