M-ARY PULSE AMPLITUDE MODULATION DIGITAL EQUALIZER

    公开(公告)号:WO2017105752A8

    公开(公告)日:2018-07-12

    申请号:PCT/US2016062509

    申请日:2016-11-17

    Applicant: INTEL CORP

    CPC classification number: H04B3/145 H04B1/0007 H04B14/023

    Abstract: Some embodiments include apparatus and methods using an input node, an analog to digital converter (ADC) including an input coupled to the input node, a first feedforward equalizer (FFE) including an input coupled to an output of the ADC, a second FFE including an input coupled to the output of the ADC, and a decision feedback equalizer (DFE) including a first input, a second input, and an output, the first input coupled to an output of the first FFE, and the second input coupled to an output of the second FFE.

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