公开(公告)号：NL2029044B1

公开(公告)日：2022-07-27

申请号：NL2029044

申请日：2021-08-25

Applicant: INTEL CORP

Inventor： FRANCESC GUIM BERNAT ,  NED M SMITH ,  SURAJ PRABHAKARAN ,  TARUN VISWANATHAN ,  KAPIL SOOD ,  TIMOTHY VERRALL ,  KSHITIJ DOSHI

IPC: H04L67/10 ,  H04W4/029 ,  H04W8/18 ,  H04W40/18 ,  H04W64/00

Abstract: Systems and techniques for intelligent data forwarding in edge networks are described herein. A request may be received from an edge user device for a service via a first endpoint. A time value may be calculated using a timestamp of the request. Motion characteristics may be determined for the edge user device using the time value. A response to the request may be transmitted to a second endpoint based on the motion characteristics.

公开(公告)号：NL2029790A

公开(公告)日：2022-07-20

申请号：NL2029790

申请日：2021-11-17

Applicant: INTEL CORP

Inventor： MICHAEL KOUNAVIS ,  NED M SMITH ,  JUNYUAN WANG ,  KAIJIE GUO

IPC: G06F21/60

Abstract: Technology for protecting tenant workloads and tenant data within a multi-tenant workload environment may include a workload processor allocable into tenant slices, a cryptographic engine, memory storing a key table, and a key provisioner to provision a separate tenant key for each 5 workload, each tenant key stored in the key table with an associated unique key handle and a resource identifier for a separate one of the plurality of tenant slices assigned to the respective workload, provide each respective tenant key to a respective requestor of each workload, and provide, for each workload, the respective key handle to the assigned tenant slice, the tenant slice to use the key handle to perform, via the cryptographic engine, a cryptographic operation on a wrapped 10 data key associated with the workload.

公开(公告)号：NL2029029B1

公开(公告)日：2022-06-28

申请号：NL2029029

申请日：2021-08-24

Applicant: INTEL CORP

Inventor： RAJESH GADIYAR ,  KSHITIJ DOSHI ,  MARCIN SPOCZYNSKI ,  FRANCESC GUIM BERNAT ,  CHRISTIAN MACIOCCO ,  NED M SMITH ,  TREVOR COOPER ,  TIMOTHY VERRALL ,  VALERIE PARKER

IPC: H04L41/5009 ,  H04L41/5019 ,  H04L43/0805

Abstract: Methods and apparatus to coordinate edge platforms are disclosed. A disclosed example apparatus includes to control processing of data associated with edges includes an orchestrator analyzer to determine a first performance requirement of a first microservice of an application and a second performance requirement of a second microservice of the application. The apparatus also includes an orchestrator controller to assign the first microservice and the second microservice across first and second edge nodes between a source network and a destination network by: assigning the first microservice to the first edge node based on a first capability of the first edge node satisfying the first performance requirement of the first microservice, and assigning the second microservice to the second edge node based on a second capability of the second edge node satisfying the second performance requirement of the second microservice.

公开(公告)号：GB2482811B

公开(公告)日：2017-07-05

申请号：GB201119749

申请日：2010-10-27

Applicant: INTEL CORP

Inventor： NED M SMITH ,  VEDVYAS SHANBHOGUE ,  ARVIND KUMAR ,  PURUSHOTTAM GOEL

IPC: G06F21/00 ,  G06F21/54 ,  G06F21/57

公开(公告)号：NL2029297A

公开(公告)日：2022-06-17

申请号：NL2029297

申请日：2021-09-30

Applicant: INTEL CORP

Inventor： RAJESH POORNACHANDRAN ,  DAVID ZAGE ,  DAVID PUFFER ,  RONALD SILVAS ,  ALEX NAYSHTUT ,  NED M SMITH ,  ARAVINDH ANANTARAMAN ,  JULIEN CARRENO ,  TOMER LEVY ,  VIDHYA KRISHNAN ,  ANKUR SHAH ,  OMER BEN-SHALOM ,  ADITYA NAVALE ,  XIAOYU RUAN ,  DAVID COWPERTHWAITE ,  SCOTT JANUS ,  SIDDHARTHA CHHABRA ,  VEDVYAS SHANBOGUE

IPC: G06F21/57 ,  G06F21/78 ,  G06F21/84

Abstract: Systems, apparatuses and methods may provide for encryption based technology. Data may be encrypted locally with a graphics processor with encryption engines. The graphics processor components may be verified with a root-of-trust and based on collection 5 of claims. The graphics processor may further be able to modify encrypted data from a non- pageable format to a pageable format. The graphics processor may further process data associated with a virtual machine based on a key that is known by the virtual machine and the graphics processor. 10

公开(公告)号：NL2029044A

公开(公告)日：2022-05-24

申请号：NL2029044

申请日：2021-08-25

Applicant: INTEL CORP

Inventor： FRANCESC GUIM BERNAT ,  NED M SMITH ,  SURAJ PRABHAKARAN ,  TARUN VISWANATHAN ,  KAPIL SOOD ,  TIMOTHY VERRALL ,  KSHITIJ DOSHI

IPC: H04L67/10 ,  H04W4/029 ,  H04W8/18 ,  H04W40/18 ,  H04W64/00

Abstract: Systems and techniques for intelligent data forwarding in edge networks are described herein. A request may be received from an edge user device for a service via a first endpoint. A time value may be calculated using a timestamp of the request. Motion characteristics may be determined for the edge user device using the time value. A response to the request may be transmitted to a second endpoint based on the motion characteristics.

公开(公告)号：NL2029029A

公开(公告)日：2022-05-24

申请号：NL2029029

申请日：2021-08-24

Applicant: INTEL CORP

Inventor： RAJESH GADIYAR ,  KSHITIJ DOSHI ,  MARCIN SPOCZYNSKI ,  FRANCESC GUIM BERNAT ,  CHRISTIAN MACIOCCO ,  NED M SMITH ,  TREVOR COOPER ,  TIMOTHY VERRALL ,  VALERIE PARKER

IPC: H04L41/5009 ,  H04L41/5019 ,  H04L43/0805

Abstract: Methods and apparatus to coordinate edge platforms are disclosed. A disclosed example apparatus includes to control processing of data associated with edges includes an orchestrator analyzer to determine a first performance requirement of a first microservice of an application and a second performance requirement of a second microservice of the application. The apparatus also includes an orchestrator controller to assign the first microservice and the second microservice across first and second edge nodes between a source network and a destination network by: assigning the first microservice to the first edge node based on a first capability of the first edge node satisfying the first performance requirement of the first microservice, and assigning the second microservice to the second edge node based on a second capability of the second edge node satisfying the second performance requirement of the second microservice.

公开(公告)号：BR112014013583A2

公开(公告)日：2017-06-13

申请号：BR112014013583

申请日：2011-12-29

Applicant: INTEL CORP

Inventor： NED M SMITH ,  VICTORIA C MOORE ,  VINCENT J ZIMMER

IPC: G06F9/24

Abstract: resumo patente de invenção: "método e aparelho para otimização de inicialização confiável". a presente invenção refere-se sistema de processamento de dados pode incluir um dispositivo de armazenamento de alta integridade (his) com uma partição ou cache que é protegido de atualizações. o sistema de processamento de dados pode executar um processo de inicialização em resposta a ser reativado. o processo de inicialização pode incluir a operação de executar um objeto de inicialização. durante o processo de inicialização, antes da execução do objeto de inicialização, o sistema de processamento de dados pode recuperar uma compilação para o objeto de inicialização do cache protegido do dispositivo his. a compilação pode ser um valor hash criptográfico para o objeto de inicialização. durante o processo de inicialização, a compilação recuperada pode ser estendida para um registro de configuração de plataforma em um módulo de plataforma confiável do sistema de processamento de dados. outras concretizações são descritas e reivindicadas.

公开(公告)号：NL2029297B1

公开(公告)日：2022-09-16

申请号：NL2029297

申请日：2021-09-30

Applicant: INTEL CORP

Inventor： RAJESH POORNACHANDRAN ,  DAVID ZAGE ,  VEDVYAS SHANBHOGUE ,  DAVID PUFFER ,  RONALD SILVAS ,  ALEX NAYSHTUT ,  NED M SMITH ,  ARAVINDH ANANTARAMAN ,  JULIEN CARRENO ,  TOMER LEVY ,  VIDHYA KRISHNAN ,  ANKUR SHAH ,  OMER BEN-SHALOM ,  ADITYA NAVALE ,  XIAOYU RUAN ,  DAVID COWPERTHWAITE ,  SCOTT JANUS ,  SIDDHARTHA CHHABRA

IPC: G06F21/57 ,  G06F21/78 ,  G06F21/84

Abstract: Systems, apparatuses and methods may provide for encryption based technology. Data may be encrypted locally with a graphics processor with encryption engines. The graphics processor components may be verified with a root-of-trust and based on collection 5 of claims. The graphics processor may further be able to modify encrypted data from a non- pageable format to a pageable format. The graphics processor may further process data associated with a virtual machine based on a key that is known by the virtual machine and the graphics processor. 10

公开(公告)号：NL2029296B1

公开(公告)日：2022-09-16

申请号：NL2029296

申请日：2021-09-30

Applicant: INTEL CORP

Inventor： ALEX NAYSHTUT ,  GAURAV KUMAR ,  OMER BEN-SHALOM ,  NED M SMITH ,  RESHMA LAL ,  PRADEEP PAPPACHAN ,  RAJESH POORNACHANDRAN ,  PRASHANT DEWAN

IPC: H04L9/32

Abstract: Methods, apparatuses and system provide for technology that interleaves a plurality of verification commands with a plurality of copy commands in a command buffer, wherein each copy command includes a message authentication code (MAC) derived from a master 5 session key, wherein one or more of the plurality of verification commands corresponds to a copy command in the plurality of copy commands, and wherein a verification command at an end of the command buffer corresponds to contents of the command buffer. The technology may also add a MAC generation command to the command buffer, wherein the MAC generation command references an address of a compute result. 10