公开(公告)号：DE112016004297T5

公开(公告)日：2018-06-14

申请号：DE112016004297

申请日：2016-08-25

Applicant: INTEL CORP

Inventor： NAKAJIMA JUN ,  MALLICK ASIT K ,  VIPAT HARSHAWARDHAN ,  TALLAM MADHUKAR ,  CASTELINO MANOHAR R

IPC: G06F9/455

Abstract: Technologien für mehrstufige Virtualisierung beinhalten eine Rechenvorrichtung mit einem Prozessor, der einen Root-Virtualisierungsmodus und einen Non-Root-Virtualisierungsmodus unterstützt. Ein Non-Root-Hypervisor stellt fest, ob er unter der Kontrolle eines Root-Hypervisors ausgeführt wird; falls ja, registriert er beim Root-Hypervisor einen Callback-Handler und Auslösebedingungen. Der Non-Root-Hypervisor hostet eine oder mehrere virtuelle Maschinen. In Reaktion auf einen Ausgang einer virtuellen Maschine stellt der Root-Hypervisor fest, ob für den Grund des Ausgangs der virtuellen Maschine ein Callback-Handler registriert wurde; falls ja, überprüft er die Auslösebedingungen im Zusammenhang mit dem Callback-Handler. Wenn die Auslösebedingungen erfüllt sind, aktiviert der Root-Hypervisor den Callback-Handler. Der Callback-Handler kann ein virtuelles Virtualisierungsunterstützungsobjekt auf der Grundlage von Veränderungen aktualisieren, die vom Root-Hypervisor an einem Virtualisierungsunterstützungsobjekt vorgenommen wurden. Der Root-Hypervisor kann den Callback-Handler im Non-Root-Virtualisierungsmodus aktivieren. Weitere Ausführungsformen werden beschrieben und beansprucht.

公开(公告)号：WO2004021653A3

公开(公告)日：2004-07-22

申请号：PCT/US0327384

申请日：2003-08-28

Applicant: INTEL CORP

Inventor： VIPAT HARSHAWARDHAN

IPC: H04L12/56 ,  H04L29/00

CPC classification number: H04L45/7453 ,  H04L29/00 ,  H04L45/54

Abstract: Techniques to store entries so that minimal sequential memory accesses are used to determine all relevant entries. Entries may be grouped into blocks. The order of entries within blocks may be set in a manner so that entry locations can be determined using an input value, such as a destination address. Blocks may be ordered into levels. Blocks of each level may be stored in consecutive storage locations. Accordingly, entry locations may be determined and retrieved with minimal sequential memory accesses by storing entries in a predetermined manner.

Abstract translation: 存储条目的技术，以便使用最小顺序存储器访问来确定所有相关条目。 条目可以分组成块。 可以以使得可以使用诸如目的地地址的输入值来确定入口位置的方式来设置块内的条目的顺序。 块可能被排列成级别。 每个级别的块可以存储在连续的存储位置。 因此，可以通过以预定方式存储条目来以最小的顺序存储器访问来确定和检索入口位置。

公开(公告)号：AU2003265875A1

公开(公告)日：2004-03-19

申请号：AU2003265875

申请日：2003-08-28

Applicant: INTEL CORP

Inventor： VIPAT HARSHAWARDHAN

IPC: H04L12/56 ,  H04L29/00

Abstract: Techniques to store entries so that minimal sequential memory accesses are used to determine all relevant entries. Entries may be grouped into blocks. The order of entries within blocks may be set in a manner so that entry locations can be determined using an input value, such as a destination address. Blocks may be ordered into levels. Blocks of each level may be stored in consecutive storage locations. Accordingly, entry locations may be determined and retrieved with minimal sequential memory accesses by storing entries in a predetermined manner.

公开(公告)号：AT354230T

公开(公告)日：2007-03-15

申请号：AT03728661

申请日：2003-05-01

Applicant: INTEL CORP

Inventor： MATHEW PHILIP ,  SINGH RANJEESTA ,  LEWIN MICHAEL ,  VIPAT HARSHAWARDHAN

IPC: H04L12/56

Abstract: A method and apparatus to route information in a network is described. A technique is described to search for routine information that uses a first technique on at least a portion of a first value of a network address and a second technique on at least a portion of a second section of an address. In particular, the first value is associated with an aggregation identifier, and compared to a unique prefix. In this way, address identifiers may be generated, and this identifier is used to search for routing information.

公开(公告)号：AU2003265875A8

公开(公告)日：2004-03-19

申请号：AU2003265875

申请日：2003-08-28

Applicant: INTEL CORP

Inventor： VIPAT HARSHAWARDHAN

IPC: H04L12/56 ,  H04L29/00

Abstract: Techniques to store entries so that minimal sequential memory accesses are used to determine all relevant entries. Entries may be grouped into blocks. The order of entries within blocks may be set in a manner so that entry locations can be determined using an input value, such as a destination address. Blocks may be ordered into levels. Blocks of each level may be stored in consecutive storage locations. Accordingly, entry locations may be determined and retrieved with minimal sequential memory accesses by storing entries in a predetermined manner.

公开(公告)号：DE60311800D1

公开(公告)日：2007-03-29

申请号：DE60311800

申请日：2003-05-01

Applicant: INTEL CORP

Inventor： MATHEW PHILIP ,  SINGH RANJEESTA ,  LEWIN MICHAEL ,  VIPAT HARSHAWARDHAN

IPC: H04L12/56

Abstract: A method and apparatus to route information in a network is described. A technique is described to search for routine information that uses a first technique on at least a portion of a first value of a network address and a second technique on at least a portion of a second section of an address. In particular, the first value is associated with an aggregation identifier, and compared to a unique prefix. In this way, address identifiers may be generated, and this identifier is used to search for routing information.

公开(公告)号：AU2003229302A1

公开(公告)日：2003-12-31

申请号：AU2003229302

申请日：2003-05-15

Applicant: INTEL CORP

Inventor： MATHEW PHILIP ,  SINGH RANJEETA ,  VIPAT HARSHAWARDHAN

IPC: H04L12/56

Abstract: A method and apparatus to perform network routing using an improved routing table, search algorithm and update algorithm are described.

公开(公告)号：DE60311800T2

公开(公告)日：2007-11-22

申请号：DE60311800

申请日：2003-05-01

Applicant: INTEL CORP

Inventor： MATHEW PHILIP ,  SINGH RANJEESTA ,  LEWIN MICHAEL ,  VIPAT HARSHAWARDHAN

IPC: H04L12/56

Abstract: A method and apparatus to route information in a network is described. A technique is described to search for routine information that uses a first technique on at least a portion of a first value of a network address and a second technique on at least a portion of a second section of an address. In particular, the first value is associated with an aggregation identifier, and compared to a unique prefix. In this way, address identifiers may be generated, and this identifier is used to search for routing information.

公开(公告)号：AU2003234433A1

公开(公告)日：2003-12-02

申请号：AU2003234433

申请日：2003-05-01

Applicant: INTEL CORP

Inventor： MATHEW PHILIP ,  SINGH RANJEETA ,  LEWIN MICHAEL ,  VIPAT HARSHAWARDHAN

IPC: H04L12/56

Abstract: A method and apparatus to route information in a network is described. A technique is described to search for routine information that uses a first technique on at least a portion of a first value of a network address and a second technique on at least a portion of a second section of an address. In particular, the first value is associated with an aggregation identifier, and compared to a unique prefix. In this way, address identifiers may be generated, and this identifier is used to search for routing information.

公开(公告)号：EP3295357A1

公开(公告)日：2018-03-21

申请号：EP16793136

申请日：2016-04-20

Applicant: INTEL CORP

Inventor： SMITH NED M ,  CASTELINO MANOHAR R ,  VIPAT HARSHAWARDHAN

IPC: G06F21/50 ,  G06F9/455 ,  G06F21/62

CPC classification number: G06F21/6281 ,  G06F21/57 ,  G06F2221/2113

Abstract: Systems, apparatuses and methods may provide for conducting a signature verification of a mandatory access control policy and provisioning the mandatory access control policy into kernel memory if the signature verification is successful. Additionally, the kernel memory may be protected from unauthorized write operations by one or more processes having system level privileges. In one example, the mandatory access control policy is provisioned without a system reboot.