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    METHOD TO COUPLE LIGHT USING INTEGRATED HEAT SPREADER
    3.
    发明申请
    METHOD TO COUPLE LIGHT USING INTEGRATED HEAT SPREADER 有权

    公开(公告)号：US20220291462A1

    公开(公告)日：2022-09-15

    申请号：US17199335

    申请日：2021-03-11

    Applicant: Intel Corporation

    Inventor： Divya PRATAP ,  Xiaoqian LI ,  Chia-Pin CHIU

    IPC: G02B6/42

    Abstract: Embodiments disclosed herein include photonics systems and packages. In an embodiment, a photonics package comprises a package substrate and a photonics die overhanging an edge of the package substrate. In an embodiment, the photonics die comprises a v-groove for receiving an optical fiber. In an embodiment, the photonics package further comprises an integrated heat spreader (IHS) over the photonics die. In an embodiment, the IHS comprises a foot, and a hole through the foot is aligned with the v-groove.

    PACKAGE SYSTEM AND PACKAGE
    6.
    发明申请
    PACKAGE SYSTEM AND PACKAGE 有权

    公开(公告)号：US20220199556A1

    公开(公告)日：2022-06-23

    申请号：US17131863

    申请日：2020-12-23

    Applicant: Intel Corporation

    Inventor： Zhen ZHOU ,  Tae Young YANG ,  Tolga ACIKALIN ,  Johanny ESCOBAR PELAEZ ,  Kenneth P. FOUST ,  Chia-Pin CHIU ,  Renzhi LIU ,  Cheng-Yuan CHIN

    IPC: H01L23/66 ,  H01L29/93 ,  H01L23/14 ,  H01Q15/00 ,  H01Q1/42 ,  H01Q15/14 ,  H01Q1/22

    Abstract: In various aspects, a package system includes at least a first package and a second package arranged on a same side of the package carrier. Each of the first package and the second package comprises an antenna to transmit and/or receive radio frequency signals. A cover may be arranged at a distance over the first package and the second package at the same side of the package carrier as the first package and the second package. The cover comprises at least one conductive element forming a predefined pattern on a side of the cover facing the first package and the second package. The predefined pattern is configured as a frequency selective surface. The package system further includes a radio frequency signal interface wirelessly connecting the antennas of the first package and the second package. The radio frequency signal interface comprises the at least one conductive element.

    HYBRID INTERPOSER OF GLASS AND SILICON TO REDUCE THERMAL CROSSTALK
    7.
    发明申请
    HYBRID INTERPOSER OF GLASS AND SILICON TO REDUCE THERMAL CROSSTALK 有权

    公开(公告)号：US20210118756A1

    公开(公告)日：2021-04-22

    申请号：US16659395

    申请日：2019-10-21

    Applicant: Intel Corporation

    Inventor： Zhimin WAN ,  Chandra Mohan JHA ,  Je-Young CHANG ,  Chia-Pin CHIU

    IPC: H01L23/15 ,  H01L23/373 ,  H01L23/498 ,  H01L23/00 ,  H01L25/18

    Abstract: Embodiments include semiconductor packages. A semiconductor package includes a hybrid interposer with a first region and a second region. The first region is comprised of glass or low thermal conductive materials, and the second region is comprised of silicon or diamond materials. The semiconductor package includes a first die on the first region of the hybrid interposer, a second die on the second region of the hybrid interposer, and an integrated heat spreader over the first die, the second die, and the hybrid interposer. The hybrid interposer includes first and second interconnects, where the first interconnects vertically extend from a bottom surface of the first region to a top surface of the first region, and where the second interconnects vertically extend from a bottom surface of the second region to a top surface of the second region. The first interconnects are through-glass vias, and the second interconnects are through-silicon vias.

    LIQUID COOLING THROUGH CONDUCTIVE INTERCONNECT
    8.
    发明申请
    LIQUID COOLING THROUGH CONDUCTIVE INTERCONNECT 审中-公开

    公开(公告)号：US20200328139A1

    公开(公告)日：2020-10-15

    申请号：US16379619

    申请日：2019-04-09

    Applicant: Intel Corporation

    Inventor： Chia-Pin CHIU ,  Robert SANKMAN ,  Pooya TADAYON

    IPC: H01L23/473 ,  H05K7/20 ,  H01L23/00 ,  H01L23/367 ,  H01L23/373

    Abstract: Embodiments include semiconductor packages and cooling semiconductor packaging systems. A semiconductor package includes a second die on a package substrate, first dies on the second die, conductive bumps between the first dies and the second die, a cold plate and a manifold over the first dies, second die, and package substrate, and first openings in the manifold. The first openings are fluidly coupled through the conductive bumps. The semiconductor package may include a first fluid path through the first openings of the manifold, where a first fluid flows through the first fluid path. The semiconductor package may further include a second fluid path through second openings of the cold plate, where a second fluid flows through the second fluid path, and where the first and second fluids of the first and second fluid paths cool heat providing surfaces of the first dies, the second die, or the package substrate.

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