公开(公告)号：US20240220699A1

公开(公告)日：2024-07-04

申请号：US18148963

申请日：2022-12-30

Applicant: INTEL CORPORATION

Inventor： Michael Goldsmith ,  Prashant Majhi ,  Per Sverdrup ,  Chung-Ching Peng

IPC: G06F30/392

CPC classification number: G06F30/392 ,  G06F2111/20

Abstract: Methods, apparatus, systems, and articles of manufacture are disclosed including at least one memory; machine-readable instructions; and processor circuitry to at least one of execute or instantiate the machine-readable instructions to: obtain a register-transfer level design defining operations of electrical circuits in first and second dice of a multi-die semiconductor package, the second die to be stacked on the first die in the multi-die semiconductor package; and select placement of a cell for a physical layout for the multi-die semiconductor package based on the register-transfer level design, the cell including a via to electrically interconnect the first die to the second die.