公开(公告)号：WO2004095246A1

公开(公告)日：2004-11-04

申请号：PCT/US2004/003351

申请日：2004-02-17

Applicant: INTEL CORPORATION

Inventor： NAVEH, Alon ,  KUMAR, Mohan ,  GUTMAN, Mickey ,  MARTWICK, Andrew ,  SOLOMON, Gary

IPC: G06F1/32

CPC classification number: G06F1/3287 ,  G06F1/3203 ,  G06F1/3209 ,  H04L12/40039 ,  Y02D10/171

Abstract: Briefly, system and method for message-based power management which may be used, for example, in computer systems and communications networks. Embodiments of the present invention may include, for example, a device connected to a power management controller (PMC); the device and/or the PMC may send, receive, and/or process power management event (PME) messages. Embodiments of the present invention may operate using links in communicative and/or non-communicative modes. Embodiments of the present invention may include a switch, to send/ receive, process, create, re-format and/or route one or more PME message on behalf of various devices, for example, a Peripheral Component Interconnect (PCI) device.

Abstract translation: 简而言之，用于例如计算机系统和通信网络中的基于消息的电力管理的系统和方法。 本发明的实施例可以包括例如连接到电力管理控制器（PMC）的设备; 设备和/或PMC可以发送，接收和/或处理电源管理事件（PME）消息。 本发明的实施例可以使用通信和/或非通信模式中的链路来操作。 本发明的实施例可以包括代表诸如外围组件互连（PCI）设备的各种设备发送/接收，处理，创建，重新格式化和/或路由一个或多个PME消息的交换机。

公开(公告)号：WO2004095297A2

公开(公告)日：2004-11-04

申请号：PCT/US2004/004219

申请日：2004-02-11

Applicant: INTEL CORPORATION

Inventor： NEJEDLO, Jay ,  WIZNEROWICZ, Michael ,  ELLIS, David ,  GLASS, Richard, S. ,  MARTWICK, Andrew ,  SCHOENBORN, Theodore

IPC: G06F13/00

CPC classification number: G01R31/3187 ,  G01R31/31717 ,  H04L1/242

Abstract: According to one embodiment, a built-in self test (IBIST) architecture/methodology is disclosed. The IBIST provides for testing the functionality of an interconnect (such as a bus) between a transmitter and a receiver component. The IBIST architecture includes a pattern generator and a pattern checker. The pattern checker operates to compare a received plurality of bits (for the pattern generator) with a previously stored plurality of bits.

公开(公告)号：EP3930239A1

公开(公告)日：2021-12-29

申请号：EP20214753.4

申请日：2020-12-16

Applicant: INTEL Corporation

Inventor： MARTWICK, Andrew ,  ALTMANN, Michael ,  MIRMAK, Michael ,  AHMAD, Kamel ,  HOLLAND, Andrew ,  ZHAO, Liwei

IPC: H04L1/20 ,  G01R13/02 ,  G01R31/317

Abstract: A scheme for noise floor de-embedding by identifying a link or relationship between noise floor from an oscilloscope and phase jitter impact on a toggling signal. The scheme uses phase or electrical spectrum and phase detection for noise floor recognition. The scheme de-embeds the impact from random noise and also removes deterministic noise or jitter from the oscilloscope. The scheme provides accurate jitter analysis for a circuit (e.g., clock data recovery circuit) after de-embedding noise floor for the oscilloscope.

公开(公告)号：EP1609047A1

公开(公告)日：2005-12-28

申请号：EP04711800.5

申请日：2004-02-17

Applicant: INTEL CORPORATION

Inventor： NAVEH, Alon ,  KUMAR, Mohan ,  GUTMAN, Mickey ,  MARTWICK, Andrew ,  SOLOMON, Gary

IPC: G06F1/32

CPC classification number: G06F1/3287 ,  G06F1/3203 ,  G06F1/3209 ,  H04L12/40039 ,  Y02D10/171

Abstract: Briefly, system and method for message-based power management which may be used, for example, in computer systems and communications networks. Embodiments of the present invention may include, for example, a device connected to a power management controller (PMC); the device and/or the PMC may send, receive, and/or process power management event (PME) messages. Embodiments of the present invention may operate using links in communicative and/or non-communicative modes. Embodiments of the present invention may include a switch, to send/receive, process, create, re-format and/or route one or more PME message on behalf of various devices, for example, a Peripheral Component Interconnect (PCI) device.

公开(公告)号：EP1609047B1

公开(公告)日：2018-12-26

申请号：EP04711800.5

申请日：2004-02-17

Applicant: Intel Corporation

Inventor： NAVEH, Alon ,  KUMAR, Mohan ,  GUTMAN, Mickey ,  MARTWICK, Andrew ,  SOLOMON, Gary

IPC: G06F1/32 ,  H04L12/40

CPC classification number: G06F1/3287 ,  G06F1/3203 ,  G06F1/3209 ,  H04L12/40039 ,  Y02D10/171

Abstract: Briefly, system and method for message-based power management which may be used, for example, in computer systems and communications networks. Embodiments of the present invention may include, for example, a device connected to a power management controller (PMC); the device and/or the PMC may send, receive, and/or process power management event (PME) messages. Embodiments of the present invention may operate using links in communicative and/or non-communicative modes. Embodiments of the present invention may include a switch, to send/receive, process, create, re-format and/or route one or more PME message on behalf of various devices, for example, a Peripheral Component Interconnect (PCI) device.

公开(公告)号：EP1606713A2

公开(公告)日：2005-12-21

申请号：EP04710277.7

申请日：2004-02-11

Applicant: INTEL CORPORATION

Inventor： NEJEDLO, Jay ,  WIZNEROWICZ, Michael ,  ELLIS, David ,  GLASS, Richard, S. ,  MARTWICK, Andrew ,  SCHOENBORN, Theodore

IPC: G06F11/26

CPC classification number: G01R31/3187 ,  G01R31/31717 ,  H04L1/242

Abstract: According to one embodiment, a built-in self test (IBIST) architecture/methodology is disclosed. The IBIST provides for testing the functionality of an interconnect (such as a bus) between a transmitter and a receiver component. The IBIST architecture includes a pattern generator and a pattern checker. The pattern checker operates to compare a received plurality of bits (for the pattern generator) with a previously stored plurality of bits.