公开(公告)号：US12132805B2

公开(公告)日：2024-10-29

申请号：US17542175

申请日：2021-12-03

Applicant: Intel Corporation

Inventor： Francesc Guim Bernat ,  Karthik Kumar ,  Thomas Willhalm ,  Petar Torre ,  Ned Smith ,  Brinda Ganesh ,  Evan Custodio ,  Suraj Prabhakaran

IPC: H04L67/60 ,  H04L12/66 ,  H04L47/70 ,  H04L67/2885 ,  H04L67/5681 ,  H04L67/62

CPC classification number: H04L67/60 ,  H04L12/66 ,  H04L47/70 ,  H04L67/2885 ,  H04L67/5681 ,  H04L67/62

Abstract: Technologies for fulfilling service requests in an edge architecture include an edge gateway device to receive a request from an edge device or an intermediate tier device of an edge network to perform a function of a service by an entity hosting the service. The edge gateway device is to identify one or more input data to fulfill the request by the service and request the one or more input data from an edge resource identified to provide the input data. The edge gateway device is to provide the input data to the entity associated with the request.

公开(公告)号：US20220244999A1

公开(公告)日：2022-08-04

申请号：US17724764

申请日：2022-04-20

Applicant: Intel Corporation

Inventor： Ned Smith ,  Changzheng Wei ,  Songwu Shen ,  Ziye Yang ,  Junyuan Wang ,  Weigang Li ,  Wenqian Yu

IPC: G06F9/50 ,  G06F21/76

Abstract: Technologies for hybrid field-programmable gate array (FPGA) application-specific integrated circuit (ASIC) code acceleration are described. In one example, the computing device includes a FPGA comprising: algorithm circuitry to: perform one or more algorithm tasks of an algorithm, wherein the algorithm to perform a service request that is offloaded to the FPGA; and determine a primitive task associated with an algorithm task of the one or more algorithm tasks; primitive offload circuitry to encapsulate the primitive task in a buffer of the FPGA, wherein the buffer is accessible by an ASIC of the computing device; and result circuitry to return one or more results of the service request responsive to performance of the primitive task by the ASIC.

公开(公告)号：US20220209971A1

公开(公告)日：2022-06-30

申请号：US17568567

申请日：2022-01-04

Applicant: Intel Corporation

Inventor： Kshitij Doshi ,  Francesc Guim Bernat ,  Timothy Verrall ,  Ned Smith ,  Rajesh Gadiyar

IPC: H04L9/32 ,  H04L9/40 ,  G06F12/14 ,  H04L9/08 ,  G06F9/455 ,  G06F16/18 ,  G06F16/23 ,  G06F11/10 ,  H04L9/06 ,  H04L41/0893 ,  H04L41/5009 ,  H04L41/5025 ,  H04L43/08 ,  H04L67/1008 ,  G06F9/54 ,  G06F21/60 ,  H04L9/00 ,  H04L41/0896 ,  H04L41/142 ,  H04L41/5051 ,  H04L67/141 ,  H04L41/14 ,  H04L47/70 ,  H04L67/12 ,  G06F8/41 ,  G06F9/38 ,  G06F9/445 ,  G06F9/48 ,  G06F9/50 ,  G06F11/34

Abstract: Methods, apparatus, systems, and articles of manufacture are disclosed to aggregate telemetry data in an edge environment. An example apparatus includes at least one processor, and memory including instructions that, when executed, cause the at least one processor to at least generate a composition for an edge service in the edge environment, the composition representative of a first interface to obtain the telemetry data, the telemetry data associated with resources of the edge service and including a performance metric, generate a resource object based on the performance metric, generate a telemetry object based on the performance metric, and generate a telemetry executable based on the composition, the composition including at least one of the resource object or the telemetry object, the telemetry executable to generate the telemetry data in response to the edge service executing a computing task distributed to the edge service based on the telemetry data.

公开(公告)号：US20220206857A1

公开(公告)日：2022-06-30

申请号：US17521592

申请日：2021-11-08

Applicant: Intel Corporation

Inventor： Francesc Guim Bernat ,  Karthik Kumar ,  Ned Smith ,  Thomas Willhalm ,  Timothy Verrall

IPC: G06F9/50 ,  G06F1/26 ,  G06F9/455 ,  G06F1/3293 ,  G06F9/48 ,  G06F9/54

Abstract: Technologies for providing dynamic selection of edge and local accelerator resources includes a device having circuitry to identify a function of an application to be accelerated, determine one or more properties of an accelerator resource available at the edge of a network where the device is located, and determine one or more properties of an accelerator resource available in the device. Additionally, the circuitry is to determine a set of acceleration selection factors associated with the function, wherein the acceleration factors are indicative of one or more objectives to be satisfied in the acceleration of the function. Further, the circuitry is to select, as a function of the one or more properties of the accelerator resource available at the edge, the one or more properties of the accelerator resource available in the device, and the acceleration selection factors, one or more of the accelerator resources to accelerate the function.

公开(公告)号：US20220182441A1

公开(公告)日：2022-06-09

申请号：US17552258

申请日：2021-12-15

Applicant: Intel Corporation

Inventor： Francesc Guim Bernat ,  Ned Smith ,  Evan Custodio ,  Suraj Prabhkaran ,  Ignacio Astilleros Diez

IPC: H04L67/1008 ,  H04L41/5006 ,  H04L67/51 ,  H04L12/14 ,  H04L47/80 ,  H04L41/5051 ,  H04M15/00 ,  H04L67/61 ,  H04L67/63 ,  H04L67/562

Abstract: Technologies for determining a set of edge resources to offload a workload from a client compute device based on a brokering logic provided by a service provider include a device that includes circuitry that is in communication with edge resources. The circuitry is to receive a brokering logic from a service provider receive a request from a client compute device, wherein the request includes a function to be used to execute the request and one or more parameters associated with the client compute device, determine the one or more parameters, select, as a function of the one or more parameters and the brokering logic, a physical implementation to perform the function, wherein the physical implementation indicates a set of edge resources and a performance level for each edge resource of the set of edge resources, and perform, in response to a selection of the physical implementation, the request using the set of edge resources associated with the physical implementation.

公开(公告)号：US11245538B2

公开(公告)日：2022-02-08

申请号：US16723195

申请日：2019-12-20

Applicant: Intel Corporation

Inventor： Kshitij Doshi ,  Francesc Guim Bernat ,  Timothy Verrall ,  Ned Smith ,  Rajesh Gadiyar

IPC: H04L29/08 ,  H04L9/32 ,  H04L29/06 ,  G06F12/14 ,  H04L9/08 ,  G06F9/455 ,  G06F16/18 ,  G06F16/23 ,  G06F11/10 ,  H04L9/06 ,  H04L12/24 ,  H04L12/26 ,  G06F9/54 ,  G06F21/60 ,  H04L9/00 ,  H04L12/911 ,  G06F8/41 ,  G06F9/38 ,  G06F9/445 ,  G06F9/48 ,  G06F9/50 ,  G06F11/34 ,  G16Y40/10

Abstract: Methods, apparatus, systems, and articles of manufacture are disclosed to aggregate telemetry data in an edge environment. An example apparatus includes at least one processor, and memory including instructions that, when executed, cause the at least one processor to at least generate a composition for an edge service in the edge environment, the composition representative of a first interface to obtain the telemetry data, the telemetry data associated with resources of the edge service and including a performance metric, generate a resource object based on the performance metric, generate a telemetry object based on the performance metric, and generate a telemetry executable based on the composition, the composition including at least one of the resource object or the telemetry object, the telemetry executable to generate the telemetry data in response to the edge service executing a computing task distributed to the edge service based on the telemetry data.

公开(公告)号：US11232127B2

公开(公告)日：2022-01-25

申请号：US16235202

申请日：2018-12-28

Applicant: Intel Corporation

Inventor： Francesc Guim Bernat ,  Karthik Kumar ,  Suraj Prabhakaran ,  Ramanathan Sethuraman ,  Timothy Verrall ,  Ned Smith

IPC: G06F16/27 ,  G06F3/06

Abstract: Technologies for providing dynamic persistence of data in edge computing include a device including circuitry configured to determine multiple different logical domains of data storage resources for use in storing data from a client compute device at an edge of a network. Each logical domain has a different set of characteristics. The circuitry is also to configured to receive, from the client compute device, a request to persist data. The request includes a target persistence objective indicative of an objective to be satisfied in the storage of the data. Additionally, the circuitry is configured to select, as a function of the characteristics of the logical domains and the target persistence objective, a logical domain into which to persist the data and provide the data to the selected logical domain.

公开(公告)号：US20220021708A1

公开(公告)日：2022-01-20

申请号：US17187145

申请日：2021-02-26

Applicant: Intel Corporation

Inventor： Ned Smith

IPC: H04L29/06 ,  H04L29/08 ,  G06F16/27 ,  H04L9/32 ,  H04L9/08

Abstract: Methods, apparatus, systems and articles of manufacture are disclosed to facilitate information exchange using publish-subscribe with blockchain. An example apparatus includes a security manager to integrate a security service with an instruction execution flow in a distributed device environment. The security manager is to include a processor. The processor is to be configured to implement at least an executable hierarchical state machine to provide credential management and access management in conjunction with instruction execution according to an execution plan. The executable hierarchical state machine is to generate a security context for the execution plan to implement a guard condition governing a transition from a first state to a second state in accordance with the execution plan.

公开(公告)号：US11184236B2

公开(公告)日：2021-11-23

申请号：US16723873

申请日：2019-12-20

Applicant: Intel Corporation

Inventor： Francesc Guim Bernat ,  Kshitij Doshi ,  Ned Smith ,  Thijs Metsch

IPC: G06F9/46 ,  H04L12/24 ,  H04L12/931 ,  H04L12/911 ,  G06F9/48 ,  G06F9/50 ,  G06F9/54 ,  G06F11/30 ,  H04L9/06 ,  H04L9/32 ,  G06F1/20 ,  H04L29/08 ,  H04W4/08 ,  H04W12/04

Abstract: Methods, apparatus, systems and articles of manufacture are disclosed to control processing of telemetry data at an edge platform. An example apparatus includes an orchestrator interface to, responsive to an amount of resources allocated to an orchestrator to orchestrate a workload at the edge platform meeting a first threshold, transmit telemetry data associated with the orchestrator to a computer to obtain a first orchestration result at a first granularity; a resource management controller to determine a second orchestration result at a second granularity to orchestrate the workload at the edge platform, the second granularity finer than the first granularity; and a scheduler to schedule a workload assigned to the edge platform based on the second orchestration result.

公开(公告)号：US11169853B2

公开(公告)日：2021-11-09

申请号：US16236196

申请日：2018-12-28

Applicant: Intel Corporation

Inventor： Francesc Guim Bernat ,  Karthik Kumar ,  Ned Smith ,  Thomas Willhalm ,  Timothy Verrall

IPC: G06F9/50 ,  G06F9/48 ,  G06F9/54 ,  G06F1/26 ,  G06F9/455 ,  G06F1/3293

Abstract: Technologies for providing dynamic selection of edge and local accelerator resources includes a device having circuitry to identify a function of an application to be accelerated, determine one or more properties of an accelerator resource available at the edge of a network where the device is located, and determine one or more properties of an accelerator resource available in the device. Additionally, the circuitry is to determine a set of acceleration selection factors associated with the function, wherein the acceleration factors are indicative of one or more objectives to be satisfied in the acceleration of the function. Further, the circuitry is to select, as a function of the one or more properties of the accelerator resource available at the edge, the one or more properties of the accelerator resource available in the device, and the acceleration selection factors, one or more of the accelerator resources to accelerate the function.