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公开(公告)号:US20190188025A1
公开(公告)日:2019-06-20
申请号:US16271664
申请日:2019-02-08
Applicant: Intel Corporation
Inventor: Andrew Anderson , Yi Zou
CPC classification number: G06F9/45558 , G06F3/0611 , G06F3/0653 , G06F3/067 , G06F16/128 , G06F2009/45579
Abstract: Embodiments of the present disclosure are directed towards techniques and configurations for an apparatus configured to provide I/O classification information in a distributed cloud storage system, in accordance with some embodiments. In one embodiment, the apparatus may include a partition scanner, to scan an image of a virtual disk associated with the storage system, to determine one or more partitions associated with the virtual disk; a file system scanner coupled with the partition scanner, to identify file systems associated with the determined partitions, to access files stored in the identified file systems; and I/O classifier coupled with the file system scanner, to generate I/O classification information associated with the accessed files. The I/O classification information provides characteristics of input-output operations performed on the virtual disk. Other embodiments may be described and/or claimed.
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公开(公告)号:US20240134803A1
公开(公告)日:2024-04-25
申请号:US18279029
申请日:2021-03-24
Applicant: Intel Corporation
Inventor: Sanjay Kumar , Phillip Lantz , Rajesh Sankaran , David Hansen , Evgeny V. Voevodin , Andrew Anderson , Lizhen You , Xin Zhou , Nikhil Talpallikar
IPC: G06F12/1009
CPC classification number: G06F12/1009
Abstract: An embodiment of an integrated circuit may comprise an array of hardware counters, and circuitry communicatively coupled to the array of hardware counters, the circuitry to count accesses to one or more selected pages of a memory with the array of hardware counters. Other embodiments are disclosed and claimed.
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公开(公告)号:US11003477B2
公开(公告)日:2021-05-11
申请号:US16271664
申请日:2019-02-08
Applicant: Intel Corporation
Inventor: Andrew Anderson , Yi Zou
IPC: G06F9/455 , G06F3/06 , G06F16/11 , G06F12/0862 , G06F16/172
Abstract: Embodiments of the present disclosure are directed towards techniques and configurations for an apparatus configured to provide I/O classification information in a distributed cloud storage system, in accordance with some embodiments. In one embodiment, the apparatus may include a partition scanner, to scan an image of a virtual disk associated with the storage system, to determine one or more partitions associated with the virtual disk; a file system scanner coupled with the partition scanner, to identify file systems associated with the determined partitions, to access files stored in the identified file systems; and I/O classifier coupled with the file system scanner, to generate I/O classification information associated with the accessed files. The I/O classification information provides characteristics of input-output operations performed on the virtual disk. Other embodiments may be described and/or claimed.
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公开(公告)号:US20240232096A9
公开(公告)日:2024-07-11
申请号:US18279029
申请日:2021-03-25
Applicant: Intel Corporation
Inventor: Sanjay Kumar , Phillip Lantz , Rajesh Sankaran , David Hansen , Evgeny V. Voevodin , Andrew Anderson , Lizhen You , Xin Zhou , Nikhil Talpallikar
IPC: G06F12/1009
CPC classification number: G06F12/1009
Abstract: An embodiment of an integrated circuit may comprise an array of hardware counters, and circuitry communicatively coupled to the array of hardware counters, the circuitry to count accesses to one or more selected pages of a memory with the array of hardware counters. Other embodiments are disclosed and claimed.
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公开(公告)号:US20230093247A1
公开(公告)日:2023-03-23
申请号:US17481770
申请日:2021-09-22
Applicant: Intel Corporation
Inventor: Sanjay Kumar , Bhargavi Narayanasetty , Andrew Anderson , Anupama Kurpad , Evgeny V. Voevodin , Patrick Ndouniama , Sai Prashanth Muralidhara , Rajat Agarwal , Mohamed Arafa
IPC: G06F3/06
Abstract: An embodiment of an integrated circuit may comprise local memory, a plurality of per-page counters located in a non-system-addressable region of the local memory, and circuitry coupled to the local memory, the circuitry to count accesses to pages of a system-addressable memory space with the plurality of per-page counters located in the non-system-addressable region of the local memory. Other embodiments are disclosed and claimed.
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