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公开(公告)号：US20190317773A1
公开(公告)日：2019-10-17
申请号：US16388670
申请日：2019-04-18
Applicant: Intel Corporation
Inventor： Guy M. Therien , Paul S. Diefenbaugh , Anil Aggarwal , Andrew D. Henroid , Jeremy J. Shrall , Efraim Rotem , Krishnakanth V. Sistla , Eliezer Weissmann
IPC: G06F9/4401 , G06F16/22 , G06F1/324 , G06F1/3234 , G06F9/44 , G06F1/26 , G06F9/22 , G06F9/445 , G06F11/36 , G06F1/3203 , G06F11/34 , G06F11/30 , G06F1/3296 , G06F1/28
Abstract: The present invention relates to a platform power management scheme. In some embodiments, a platform provides a relative performance scale using one or more parameters to be requested by an OSPM system.
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公开(公告)号：US20170102944A1
公开(公告)日：2017-04-13
申请号：US15386615
申请日：2016-12-21
Applicant: Intel Corporation
Inventor： Gautham Chinya , Hong Wang , Prashant Sethi , Shivnandan Kaushik , Bryant Bigbee , John Shen , Richard Hankins , Xiang Zou , Baiju V. Patel , Jason W. Brandt , Anil Aggarwal , John L. Reid
CPC classification number: G06F9/3005 , G06F9/3009 , G06F9/3851 , G06F9/3861 , G06F9/3877 , G06F9/3885 , G06F9/461
Abstract: Embodiments of the invention provide a method of creating, based on an operating-system-scheduled thread running on an operating-system-visible sequencer and using an instruction set extension, a persistent user-level thread to run on an operating-system-sequestered sequencer independently of context switch activities on the operating-system-scheduled thread. The operating-system-scheduled thread and the persistent user-level thread may share a common virtual address space. Embodiments of the invention may also provide a method of causing a service thread running on an additional operating-system-visible sequencer to provide operating system services to the persistent user-level thread. Embodiments of the invention may further provide apparatus, system, and machine-readable medium thereof.
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公开(公告)号：US20170003724A1
公开(公告)日：2017-01-05
申请号：US15262816
申请日：2016-09-12
Applicant: Intel Corporation
Inventor： Guy M. Therien , Paul S. Diefenbaugh , Anil Aggarwal , Andrew D. Henroid , Jeremy J. Shrall , Efraim Rotem , Krishnakanth V. Sistla , Eliezer Weissmann
CPC classification number: G06F9/4403 , G06F1/206 , G06F1/26 , G06F1/28 , G06F1/32 , G06F1/3203 , G06F1/3234 , G06F1/324 , G06F1/3275 , G06F1/3296 , G06F9/22 , G06F9/30098 , G06F9/3012 , G06F9/384 , G06F9/44 , G06F9/4401 , G06F9/4418 , G06F9/445 , G06F11/3024 , G06F11/3409 , G06F11/3447 , G06F11/3466 , G06F11/3664 , G06F11/3672 , G06F11/3688 , G06F15/7871 , G06F17/30339 , G06F2209/501 , G06F2217/78 , Y02D10/126 , Y02D10/172
Abstract: The present invention relates to a platform power management scheme. In some embodiments, a platform provides a relative performance scale using one or more parameters to be requested by an OSPM system.
Abstract translation: 本发明涉及一种平台电源管理方案。 在一些实施例中，平台使用OSPM系统请求的一个或多个参数来提供相对性能量表。
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公开(公告)号：US11221857B2
公开(公告)日：2022-01-11
申请号：US16388670
申请日：2019-04-18
Applicant: Intel Corporation
Inventor： Guy M. Therien , Paul S. Diefenbaugh , Anil Aggarwal , Andrew D. Henroid , Jeremy J. Shrall , Efraim Rotem , Krishnakanth V. Sistla , Eliezer Weissmann
IPC: G06F1/00 , G06F11/30 , G06F9/4401 , G06F16/22 , G06F1/3203 , G06F1/324 , G06F1/3296 , G06F9/44 , G06F9/445 , G06F1/28 , G06F1/3234 , G06F11/36 , G06F1/26 , G06F9/22 , G06F11/34 , G06F9/30 , G06F1/20 , G06F15/78 , G06F1/32 , G06F9/38 , G06F119/06
Abstract: The present invention relates to a platform power management scheme. In some embodiments, a platform provides a relative performance scale using one or more parameters to be requested by an OSPM system.
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公开(公告)号：US10275260B2
公开(公告)日：2019-04-30
申请号：US15262816
申请日：2016-09-12
Applicant: Intel Corporation
Inventor： Guy M. Therien , Paul S. Diefenbaugh , Anil Aggarwal , Andrew D. Henroid , Jeremy J. Shrall , Efraim Rotem , Krishnakanth V. Sistla , Eliezer Weissmann
IPC: G06F1/00 , G06F11/30 , G06F9/4401 , G06F17/30 , G06F9/44 , G06F9/445 , G06F1/28 , G06F1/3234 , G06F11/36 , G06F1/26 , G06F9/22 , G06F1/3203 , G06F1/324 , G06F1/3296 , G06F11/34 , G06F9/30 , G06F1/20 , G06F15/78 , G06F1/32 , G06F9/38
Abstract: The present invention relates to a platform power management scheme. In some embodiments, a platform provides a relative performance scale using one or more parameters to be requested by an OSPM system.
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Patent Agency Ranking
公开(公告)号：US10007528B2
公开(公告)日：2018-06-26
申请号：US13683748
申请日：2012-11-21
Applicant: Intel Corporation
Inventor： Guy M. Therien , Paul Diefenbaugh , Anil Aggarwal , Andrew D. Henroid , Jeremy J. Shrall , Efraim Rotem , Krishnakanth V. Sistla , Eliezer Weissmann , Mohan Kumar , Sarathy Jayakumar , Jose Andy Vargas , Neelam Chandwani , Michael A. Rothman , Robert Gough , Mark Doran
IPC: G06F17/30 , G06F9/4401 , G06F9/44 , G06F9/445 , G06F1/28 , G06F11/36 , G06F1/26 , G06F9/22 , G06F11/30 , G06F11/34 , G06F9/30 , G06F1/20 , G06F15/78 , G06F1/32 , G06F9/38
CPC classification number: G06F9/4403 , G06F1/206 , G06F1/26 , G06F1/28 , G06F1/32 , G06F1/3203 , G06F1/3234 , G06F1/324 , G06F1/3275 , G06F1/3296 , G06F9/22 , G06F9/30098 , G06F9/3012 , G06F9/384 , G06F9/44 , G06F9/4401 , G06F9/4418 , G06F9/445 , G06F11/3024 , G06F11/3409 , G06F11/3447 , G06F11/3466 , G06F11/3664 , G06F11/3672 , G06F11/3688 , G06F15/7871 , G06F16/2282 , G06F2209/501 , G06F2217/78 , Y02D10/126 , Y02D10/172
Abstract: In some embodiments, a PPM interface may be provided with functionality to facilitate to an OS memory power state management for one or more memory nodes, regardless of a particular platform hardware configuration, as long as the platform hardware is in conformance with the PPM interface.
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公开(公告)号：US20160274910A1
公开(公告)日：2016-09-22
申请号：US15166469
申请日：2016-05-27
Applicant: Intel Corporation
Inventor： Gautham Chinya , Hong Wang , Prashant Sethi , Shivnandan Kaushik , Bryant Bigbee , John Shen , Richard Hankins , Xiang Zou , Baiju V. Patel , Jason W. Brandt , Anil Aggarwal , John L. Reid
CPC classification number: G06F9/3005 , G06F9/3009 , G06F9/3851 , G06F9/3861 , G06F9/3877 , G06F9/3885 , G06F9/461
Abstract: Embodiments of the invention provide a method of creating, based on an operating-system-scheduled thread running on an operating-system-visible sequencer and using an instruction set extension, a persistent user-level thread to run on an operating-system-sequestered sequencer independently of context switch activities on the operating-system-scheduled thread. The operating-system-scheduled thread and the persistent user-level thread may share a common virtual address space. Embodiments of the invention may also provide a method of causing a service thread running on an additional operating-system-visible sequencer to provide operating system services to the persistent user-level thread. Embodiments of the invention may further provide apparatus, system, and machine-readable medium thereof.
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公开(公告)号：US20160004291A1
公开(公告)日：2016-01-07
申请号：US14855553
申请日：2015-09-16
Applicant: Intel Corporation
Inventor： Krishnakanth V. Sistla , Jeremy Shrall , Stephen H. Gunther , Efraim Rotem , Alon Naveh , Eliezer Weissmann , Anil Aggarwal , Martin T. Rowland , Ankush Varma , Ian M. Steiner , Matthew Bace , Avinash N. Ananthakrishnan , Jason Brandt
IPC: G06F1/32
CPC classification number: G06F1/3275 , G06F1/266 , G06F1/3203 , G06F1/3206 , G06F1/3234
Abstract: In one embodiment, the present invention includes a processor having a core and a power controller to control power management features of the processor. The power controller can receive an energy performance bias (EPB) value from the core and access a power-performance tuning table based on the value. Using information from the table, at least one setting of a power management feature can be updated. Other embodiments are described and claimed.
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公开(公告)号：US09875102B2
公开(公告)日：2018-01-23
申请号：US15386615
申请日：2016-12-21
Applicant: Intel Corporation
Inventor： Gautham Chinya , Hong Wang , Prashant Sethi , Shivnandan Kaushik , Bryant Bigbee , John Shen , Richard Hankins , Xiang Zou , Baiju V. Patel , Jason W. Brandt , Anil Aggarwal , John L. Reid
CPC classification number: G06F9/3005 , G06F9/3009 , G06F9/3851 , G06F9/3861 , G06F9/3877 , G06F9/3885 , G06F9/461
Abstract: Embodiments of the invention provide a method of creating, based on an operating-system-scheduled thread running on an operating-system-visible sequencer and using an instruction set extension, a persistent user-level thread to run on an operating-system-sequestered sequencer independently of context switch activities on the operating-system-scheduled thread. The operating-system-scheduled thread and the persistent user-level thread may share a common virtual address space. Embodiments of the invention may also provide a method of causing a service thread running on an additional operating-system-visible sequencer to provide operating system services to the persistent user-level thread. Embodiments of the invention may further provide apparatus, system, and machine-readable medium thereof.
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公开(公告)号：US09766891B2
公开(公告)日：2017-09-19
申请号：US15166469
申请日：2016-05-27
Applicant: Intel Corporation
Inventor： Gautham Chinya , Hong Wang , Prashant Sethi , Shivnandan Kaushik , Bryant Bigbee , John Shen , Richard Hankins , Xiang Zou , Baiju V. Patel , Jason W. Brandt , Anil Aggarwal , John L. Reid
CPC classification number: G06F9/3005 , G06F9/3009 , G06F9/3851 , G06F9/3861 , G06F9/3877 , G06F9/3885 , G06F9/461
Abstract: Embodiments of the invention provide a method of creating, based on an operating-system-scheduled thread running on an operating-system-visible sequencer and using an instruction set extension, a persistent user-level thread to run on an operating-system-sequestered sequencer independently of context switch activities on the operating-system-scheduled thread. The operating-system-scheduled thread and the persistent user-level thread may share a common virtual address space. Embodiments of the invention may also provide a method of causing a service thread running on an additional operating-system-visible sequencer to provide operating system services to the persistent user-level thread. Embodiments of the invention may further provide apparatus, system, and machine-readable medium thereof.
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