公开(公告)号：US20190385657A1

公开(公告)日：2019-12-19

申请号：US16012634

申请日：2018-06-19

Applicant: Intel Corporation

Inventor： Charles Augustine ,  Charles Kuo ,  Benjamin Chu-kung ,  Muhammad Khellah

IPC: G11C11/38 ,  G11C11/412 ,  G11C11/419 ,  H01L27/11

Abstract: An apparatus is provided which comprises: a storage node; a first device coupled to the storage node; a second device coupled to a first reference and the storage node, wherein the second device has negative differential resistance (NDR); a third device coupled to a second reference and the storage node, wherein the third device has NDR; and a circuitry for reading data, the circuitry coupled to the storage node and the first, second, and third devices, wherein the first, second, and third devices, and the circuitry are positioned in a backend-of-line (BEOL) of a die.