公开(公告)号：US09742616B2

公开(公告)日：2017-08-22

申请号：US14580766

申请日：2014-12-23

Applicant: Intel Corporation

Inventor： Nrupal Jani ,  Ilango Ganga ,  Daniel Daly ,  John Fastabend ,  Neerav Parikh ,  Elizabeth Kappler ,  Brian J. Skerry ,  Calin Gherghe ,  Sanjeev Jain ,  Ben-Zion Friedman

IPC: H04L29/06 ,  H04L12/54 ,  H04L12/931 ,  G06F9/455

CPC classification number: H04L29/0653 ,  G06F9/45558 ,  G06F2009/45595 ,  H04L12/56 ,  H04L49/70 ,  H04L69/22

Abstract: Devices and techniques for indicating packet processing hints are described herein. A device may receive a data packet. The device may extract a match-action attribute from the data packet that specifies an action to be applied to the data packet. The device may generate a hint field based on the match-action attribute. The hint field may include information to be used for handling the data packet. Other embodiments are also described.

公开(公告)号：US20200186553A1

公开(公告)日：2020-06-11

申请号：US16793050

申请日：2020-02-18

Applicant: Intel Corporation

Inventor： CHRIS PAVLAS ,  SCOTT DUBAL ,  Sharada Shiddibhavi ,  Amritha Nambiar ,  TREVOR COOPER ,  Robert Love ,  Calin Gherghe

IPC: H04L29/06 ,  G06F21/55 ,  G06F11/30

Abstract: One embodiment provides an apparatus. The apparatus includes detector circuitry and monitor logic local to a computing device. The detector circuitry is to generate local sensor data based, at least in part, on a sensor signal received from a sensor incorporated in the local computing device. The monitor logic is to identify an event based, at least in part, on the local sensor data. The generating and identifying is independent of operation of an operating system and/or an application executing on the local computing device.

公开(公告)号：US11010273B2

公开(公告)日：2021-05-18

申请号：US15635867

申请日：2017-06-28

Applicant: Intel Corporation

Inventor： John R. Fastabend ,  Eric W. Multanen ,  Patrick L. Connor ,  Calin Gherghe

IPC: G06F11/00 ,  G06F11/36 ,  G06F12/0897 ,  G06F12/0875 ,  G06F12/126 ,  G06F11/30 ,  G06F11/32 ,  G06F21/52 ,  G06F11/07

Abstract: Devices and methods for debugging software or detecting malicious software on a compute node are described herein. A device can include an interface to a central processing unit (CPU) of a compute node. The device can include processing circuitry. During execution of a software application of the CPU, the processing circuitry can process CPU operational metrics received over the interface, wherein values of the CPU operational metrics vary with execution of the software application. Based on the values, the processing circuitry can determine an operational status of the software application and provide an indicator of an error condition of the software application responsive to detection of an error based on any criteria. Other embodiments are also described.

公开(公告)号：US20180097825A1

公开(公告)日：2018-04-05

申请号：US15282113

申请日：2016-09-30

Applicant: INTEL CORPORATION

Inventor： CHRIS PAVLAS ,  SCOTT DUBAL ,  Sharada Shiddibhavi ,  Amritha Nambiar ,  TREVOR COOPER ,  Robert Love ,  Calin Gherghe

IPC: H04L29/06 ,  G06F21/50 ,  G06F11/30

CPC classification number: H04L63/1416 ,  G06F11/3006 ,  G06F21/552 ,  G06F2221/034

Abstract: One embodiment provides an apparatus. The apparatus includes detector circuitry and monitor logic local to a computing device. The detector circuitry is to generate local sensor data based, at least in part, on a sensor signal received from a sensor incorporated in the local computing device. The monitor logic is to identify an event based, at least in part, on the local sensor data. The generating and identifying is independent of operation of an operating system and/or an application executing on the local computing device.

公开(公告)号：US20190004929A1

公开(公告)日：2019-01-03

申请号：US15635867

申请日：2017-06-28

Applicant: Intel Corporation

Inventor： John R. Fastabend ,  Eric W. Multanen ,  Patrick L. Connor ,  Calin Gherghe

IPC: G06F11/36 ,  G06F12/0897 ,  G06F12/0875

Abstract: Devices and methods for debugging software or detecting malicious software on a compute node are described herein. A device can include an interface to a central processing unit (CPU) of a compute node. The device can include processing circuitry. During execution of a software application of the CPU, the processing circuitry can process CPU operational metrics received over the interface, wherein values of the CPU operational metrics vary with execution of the software application. Based on the values, the processing circuitry can determine an operational status of the software application and provide an indicator of an error condition of the software application responsive to detection of an error based on any criteria. Other embodiments are also described.