公开(公告)号：US20250006737A1

公开(公告)日：2025-01-02

申请号：US18216520

申请日：2023-06-29

Applicant: Intel Corporation

Inventor： Aryan Navabi-Shirazi ,  Michael Babb ,  Kai Loon Cheong ,  Cheng-Ying Huang ,  Mohammad Hasan ,  Leonard P. Guler ,  Marko Radosavljevic

IPC: H01L27/092 ,  H01L21/822 ,  H01L21/8238 ,  H01L29/06 ,  H01L29/423 ,  H01L29/66 ,  H01L29/775 ,  H01L29/786

Abstract: A material stack comprising a plurality of bi-layers, each bi-layer comprising two semiconductor material layers, is fabricated into a transistor structure including a first stack of channel materials that is coupled to an n-type source and drain and in a vertical stack with a second stack of channel materials that is coupled to a p-type source drain. Within the first stack of channel material layers a first of two semiconductor material layers may be replaced with a first gate stack while within the second stack of channel materials a second of two semiconductor material layers may be replaced with a second gate stack.