公开(公告)号：US10929146B2

公开(公告)日：2021-02-23

申请号：US15966805

申请日：2018-04-30

Applicant: Intel Corporation

Inventor： Michael Kinney ,  Michael Rothman ,  Vincent Zimmer ,  Mark Doran

IPC: G06F9/4401 ,  G06F11/30 ,  G06F11/00 ,  G06F1/14 ,  G06F9/48

Abstract: An embodiment of a semiconductor package apparatus may include technology to determine respective priority levels for one or more boot time events, determine an amount of execution time for the one or more boot time events, and automatically adjust a timer based on the amount of execution time and the priority levels for the one or more boot time events. Other embodiments are disclosed and claimed.

公开(公告)号：US08631259B2

公开(公告)日：2014-01-14

申请号：US13764245

申请日：2013-02-11

Applicant: Intel Corporation

Inventor： Michael Rothman ,  Glenn Hinton ,  Vincent Zimmer ,  Michael Kinney ,  Mark Doran

IPC: G06F9/24 ,  G06F15/177

CPC classification number: G06F1/3234 ,  G06F9/4418

Abstract: When transitioning from sleep mode to active mode, a processing system loads first stage resume content and second stage resume content into a volatile memory of the processing system. The first stage resume content may contain contextual data for a first program that was in use before the processing system transitioned to sleep mode. The second stage resume content may contain contextual data for another program that was in use before the processing system transitioned to sleep mode. The processing system may provide a user interface for the first program before all of the second stage resume content has been loaded into the volatile memory. Other embodiments are described and claimed.

Abstract translation: 当从睡眠模式转换到活动模式时，处理系统将第一级恢复内容和第二级恢复内容加载到处理系统的易失性存储器中。 第一阶段恢复内容可以包含在处理系统转换到睡眠模式之前正在使用的第一程序的上下文数据。 第二阶段恢复内容可以包含在处理系统转换到睡眠模式之前正在使用的另一程序的上下文数据。 处理系统可以在所有第二阶段恢复内容已经被加载到易失性存储器之前为第一程序提供用户界面。 描述和要求保护其他实施例。

公开(公告)号：US20190042274A1

公开(公告)日：2019-02-07

申请号：US15966805

申请日：2018-04-30

Applicant: Intel Corporation

Inventor： Michael Kinney ,  Michael Rothman ,  Vincent Zimmer ,  Mark Doran

IPC: G06F9/4401 ,  G06F1/14 ,  G06F11/00 ,  G06F11/30

Abstract: An embodiment of a semiconductor package apparatus may include technology to determine respective priority levels for one or more boot time events, determine an amount of execution time for the one or more boot time events, and automatically adjust a timer based on the amount of execution time and the priority levels for the one or more boot time events. Other embodiments are disclosed and claimed.