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1.
公开(公告)号:US12191161B2
公开(公告)日:2025-01-07
申请号:US17132282
申请日:2020-12-23
Applicant: Intel Corporation
Inventor: Oladeji Fadayomi , Jeremy Ecton , Oscar Ojeda
IPC: H01L23/49 , H01L21/48 , H01L23/498
Abstract: An integrated circuit device, comprising a substrate comprising a dielectric material and a conductor on or within the dielectric material of the substrate. The conductor comprises a first portion comprising a first sloped sidewall, wherein a first base width of the first portion is greater than a first top width of the first portion. The conductor also comprises a second portion over the first portion, the second portion comprising a second sloped sidewall, wherein a second base width of the upper portion is greater than both a second top width of the second portion and the first top width of the first portion.
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公开(公告)号:US20240101413A1
公开(公告)日:2024-03-28
申请号:US17954522
申请日:2022-09-28
Applicant: Intel Corporation
Inventor: Jeremy D. Ecton , Brandon C. Marin , Srinivas Venkata Ramanuja Pietambaram , Oladeji Fadayomi , Oscar Ojeda
CPC classification number: B81B7/0006 , B81C1/00095 , B81C1/00523 , B81C1/00611 , B81B2207/07 , B81C2201/0123
Abstract: Disclosed herein are microelectronics package architectures having self-aligned air gaps and methods of manufacturing the same. The microelectronics packages may include first and second substrates, first and second traces, and a photosensitive material. The first trace may be attached to the first substrate and comprise a first sidewall. The second trace may be attached to the first substrate and comprise a second sidewall. The second traced may be spaced a distance from the first trace with the second sidewall facing the first sidewall. First and second portions of the photosensitive material may be attached to the first and second sidewalls, respectively. The second substrate may be attached to the first and second traces. The first and second substrates and the first and second traces may form the air gap in between the first and second traces.
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3.
公开(公告)号:US20220199427A1
公开(公告)日:2022-06-23
申请号:US17132282
申请日:2020-12-23
Applicant: Intel Corporation
Inventor: Oladeji Fadayomi , Jeremy Ecton , Oscar Ojeda
IPC: H01L21/48 , H01L23/498
Abstract: An integrated circuit device, comprising a substrate comprising a dielectric material and a conductor on or within the dielectric material of the substrate. The conductor comprises a first portion comprising a first sloped sidewall, wherein a first base width of the first portion is greater than a first top width of the first portion. The conductor also comprises a second portion over the first portion, the second portion comprising a second sloped sidewall, wherein a second base width of the upper portion is greater than both a second top width of the second portion and the first top width of the first portion.
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