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公开(公告)号:US20180284872A1
公开(公告)日:2018-10-04
申请号:US15477010
申请日:2017-04-01
Applicant: Intel Corporation
Inventor: Travis T. Schluessler , Joydeep Ray , John H. Feit , Nikos Kaburlasos , Jacek Kwiatkowski , Abhishek R. Appu , Kamal Sinha , James M. Holland , Pattabhiraman K. , Sayan Lahiri , Radhakrishnan Venkataraman , Carson Brownlee , Vivek Tiwari , Kai Xiao , Jefferson Amstutz , Deepak S. Vembar , Ankur N. Shah , ElMoustapha Ould-Ahmed-Vall
Abstract: An embodiment may include an application processor, persistent storage media coupled to the application processor, and a graphics subsystem coupled to the application processor. The system may further include any of a performance analyzer to analyze a performance of the graphics subsystem to provide performance analysis information, a content-based depth analyzer to analyze content to provide content-based depth analysis information, a focus analyzer to analyze a focus area to provide focus analysis information, an edge analyzer to provide edge analysis information, a frame analyzer to provide frame analysis information, and/or a variance analyzer to analyze respective amounts of variance for the frame. The system may further include a workload adjuster to adjust a workload of the graphics subsystem based on the analysis information. Other embodiments are disclosed and claimed.
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公开(公告)号:US20220114108A1
公开(公告)日:2022-04-14
申请号:US17428529
申请日:2020-03-14
Applicant: Intel Corporation
Inventor: Altug Koker , Joydeep Ray , Elmoustapha Ould-Ahmed-Vall , Abhishek Appu , Aravindh Anantaraman , Valentin Andrei , Durgaprasad Bilagi , Varghese George , Brent Insko , Sanjeev Jahagirdar , Scott Janus , Pattabhiraman K. , SungYe Kim , Subramaniam Maiyuran , Vasanth Ranganathan , Lakshminarayanan Striramassarma , Xinmin Tian
IPC: G06F12/123 , G06F12/0891 , G06F12/0875 , G06T1/60
Abstract: Systems and methods for improving cache efficiency and utilization are disclosed. In one embodiment, a graphics processor includes processing resources to perform graphics operations and a cache controller of a cache memory that is coupled to the processing resources. The cache controller is configured to set an initial aging policy using an aging field based on age of cache lines within the cache memory and to determine whether a hint or an instruction to indicate a level of aging has been received.
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公开(公告)号:US20200005427A1
公开(公告)日:2020-01-02
申请号:US16505555
申请日:2019-07-08
Applicant: INTEL CORPORATION
Inventor: Abhishek R. APPU , Joydeep RAY , Altug KOKER , Balaji VEMBU , Pattabhiraman K. , Matthew B. CALLAWAY
Abstract: An apparatus and method for dynamic provisioning, quality of service, and prioritization in a graphics processor. For example, one embodiment of an apparatus comprises a graphics processing unit (GPU) comprising a plurality of graphics processing resources; slice configuration hardware logic to logically subdivide the graphics processing resources into a plurality of slices; and slice allocation hardware logic to allocate a designated number of slices to each virtual machine (VM) of a plurality of VMs running in a virtualized execution environment, the slice allocation hardware logic to allocate different numbers of slices to different VMs based on graphics processing requirements and/or priorities of each of the VMs.
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公开(公告)号:US20200218330A1
公开(公告)日:2020-07-09
申请号:US16819385
申请日:2020-03-16
Applicant: Intel Corporation
Inventor: Travis T. Schluessler , Joydeep Ray , John H. Feit , Nikos Kaburlasos , Jacek Kwiatkowski , Abhishek R. Appu , Kamal Sinha , James M. Holland , Pattabhiraman K. , Sayan Lahiri , Radhakrishnan Venkataraman , Carson Brownlee , Vivek Tiwari , Kai Xiao , Jefferson Amstutz , Deepak S. Vembar , Ankur N. Shah , ElMoustapha Ould-Ahmed-Vall
IPC: G06F1/3218 , G06T1/20 , G06F1/3234 , G06F9/46
Abstract: An embodiment may include an application processor, persistent storage media coupled to the application processor, and a graphics subsystem coupled to the application processor. The system may further include any of a performance analyzer to analyze a performance of the graphics subsystem to provide performance analysis information, a content-based depth analyzer to analyze content to provide content-based depth analysis information, a focus analyzer to analyze a focus area to provide focus analysis information, an edge analyzer to provide edge analysis information, a frame analyzer to provide frame analysis information, and/or a variance analyzer to analyze respective amounts of variance for the frame. The system may further include a workload adjuster to adjust a workload of the graphics subsystem based on the analysis information. Other embodiments are disclosed and claimed.
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公开(公告)号:US10591971B2
公开(公告)日:2020-03-17
申请号:US15477010
申请日:2017-04-01
Applicant: Intel Corporation
Inventor: Travis T. Schluessler , Joydeep Ray , John H. Feit , Nikos Kaburlasos , Jacek Kwiatkowski , Abhishek R. Appu , Kamal Sinha , James M. Holland , Pattabhiraman K. , Sayan Lahiri , Radhakrishnan Venkataraman , Carson Brownlee , Vivek Tiwari , Kai Xiao , Jefferson Amstutz , Deepak S. Vembar , Ankur N. Shah , ElMoustapha Ould-Ahmed-Vall
IPC: G06F1/32 , G06F1/3218 , G06T1/20 , G06F1/3234 , G06F9/46
Abstract: An embodiment may include an application processor, persistent storage media coupled to the application processor, and a graphics subsystem coupled to the application processor. The system may further include any of a performance analyzer to analyze a performance of the graphics subsystem to provide performance analysis information, a content-based depth analyzer to analyze content to provide content-based depth analysis information, a focus analyzer to analyze a focus area to provide focus analysis information, an edge analyzer to provide edge analysis information, a frame analyzer to provide frame analysis information, and/or a variance analyzer to analyze respective amounts of variance for the frame. The system may further include a workload adjuster to adjust a workload of the graphics subsystem based on the analysis information. Other embodiments are disclosed and claimed.
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