公开(公告)号：US20230197592A1

公开(公告)日：2023-06-22

申请号：US17553189

申请日：2021-12-16

Applicant: Intel Corporation

Inventor： Telesphor KAMGAING ,  Brandon RAWLINGS ,  Aleksandar ALEKSOV ,  Andrew P. COLLINS ,  Georgios C. DOGIAMIS ,  Veronica STRONG ,  Neelam PRABHU GAUNKAR

IPC: H01L23/498 ,  H05K1/18 ,  H01L23/15 ,  H01L21/48

CPC classification number: H01L23/49827 ,  H01L21/486 ,  H01L23/15 ,  H01L23/49822 ,  H01L23/49838 ,  H05K1/181

Abstract: Embodiments disclosed herein include electronic packages. In an embodiment, the electronic package comprises a core with a first surface and a second surface, where the core comprises glass. In an embodiment, a first buildup layer is over the first surface of the core, and a second buildup layer is under the second surface of the core. In an embodiment, the electronic package further comprises a via through the core between the first surface of the core and the second surface of the core, and a plane into the first surface of the core, where a width of the plane is greater than a width of the via.

公开(公告)号：US20220407212A1

公开(公告)日：2022-12-22

申请号：US17350184

申请日：2021-06-17

Applicant: Intel Corporation

Inventor： Neelam PRABHU GAUNKAR ,  Georgios C. DOGIAMIS ,  Telesphor KAMGAING ,  Veronica STRONG ,  Aleksandar ALEKSOV

IPC: H01P7/08 ,  H01L23/15 ,  H01L23/498 ,  H01L23/66 ,  H01L21/48 ,  H01P5/18 ,  H01P11/00

Abstract: Embodiments described herein may be related to apparatuses, processes, and techniques related creating millimeter wave components within a glass core of a substrate within a semiconductor package. These millimeter wave components, which include resonators, isolators, directional couplers, and circulators, may be combined to form other structures such as filters or multiplexers. Other embodiments may be described and/or claimed.

公开(公告)号：US20220406698A1

公开(公告)日：2022-12-22

申请号：US17350818

申请日：2021-06-17

Applicant: Intel Corporation

Inventor： Aleksandar ALEKSOV ,  Neelam PRABHU GAUNKAR ,  Georgios C. DOGIAMIS ,  Telesphor KAMGAING ,  Veronica STRONG ,  Johanna M. SWAN

IPC: H01L23/498 ,  H01L23/58 ,  H01L21/48 ,  H01F27/28

Abstract: Embodiments disclosed herein include electronic packages with magnetic features and methods of forming such packages. In an embodiment, a package substrate comprises a core and a conductive via through a thickness of the core. In an embodiment, a shell surrounds a perimeter of the conductive via and the shell is a magnetic material. In an embodiment, a surface of the conductive via is spaced away from the shell.

公开(公告)号：US20200219814A1

公开(公告)日：2020-07-09

申请号：US16648640

申请日：2017-12-30

Applicant: Intel Corporation

Inventor： Veronica STRONG ,  Aleksandar ALEKSOV ,  Brandon RAWLINGS

IPC: H01L23/538 ,  H01L23/522 ,  H01L23/00

Abstract: A device package and method of forming the device package are described. The device package includes a dielectric on a conductive pad, a first via on a top surface of conductive pad, where the first via extends through dielectric, and a conductive trace on dielectric. The device package has a second via on dielectric, where the conductive trace connects to first and second vias, and the second via connects to an edge of conductive trace opposite from first via. The device package may have a seed on dielectric, where the seed electrically couples to conductive trace, a first seed on the top surface of conductive pad, where the first via is on first seed, and a second seed on a top surface of first via, the second seed on surfaces of second via, where the conductive trace is on second seed disposed on both first and second vias.

公开(公告)号：US20240339381A1

公开(公告)日：2024-10-10

申请号：US18130582

申请日：2023-04-04

Applicant: Intel Corporation

Inventor： Hiroki TANAKA ,  Veronica STRONG ,  Henning BRAUNISCH ,  Haobo CHEN ,  Jeremy D. ECTON ,  Kristof DARMAWIKARTA ,  Brandon C. MARIN

IPC: H01L23/482 ,  H01L21/768 ,  H01L23/498

CPC classification number: H01L23/4821 ,  H01L21/76831 ,  H01L23/49827 ,  H01L23/49866 ,  H01L21/30604 ,  H05K2201/09218

Abstract: Embodiments disclosed herein include an interposer. In an embodiment, the interposer comprises a substrate, where the substrate comprises a glass layer. In an embodiment, a trace is on the substrate, where the trace has a bottom surface, sidewall surfaces, and a top surface. In an embodiment, the sidewall surfaces and the top surface are exposed to air. In an embodiment, a trench into the substrate is adjacent to at least one sidewall surface of the trace.

公开(公告)号：US20220407202A1

公开(公告)日：2022-12-22

申请号：US17350791

申请日：2021-06-17

Applicant: Intel Corporation

Inventor： Telesphor KAMGAING ,  Neelam PRABHU GAUNKAR ,  Georgios C. DOGIAMIS ,  Veronica STRONG ,  Aleksandar ALEKSOV

IPC: H01P3/00 ,  H01L23/15 ,  H01L23/498 ,  H01L23/66

Abstract: Embodiments disclosed herein include coplanar waveguides and methods of forming coplanar waveguides. In an embodiment, a coplanar waveguide comprises a core, and a signal trace on the core. In an embodiment, the signal trace has a first edge and a second edge. In an embodiment, a first ground trace is over the core, and the first ground trace is adjacent to the first edge of the signal trace. In an embodiment, a first ground via plane is below the first ground trace. The coplanar waveguide may further comprise a second ground trace over the core, and the second ground trace is adjacent to the second edge of the signal trace. In an embodiment, a second ground via plane below the second ground trace.

公开(公告)号：US20220406696A1

公开(公告)日：2022-12-22

申请号：US17349697

申请日：2021-06-16

Applicant: Intel Corporation

Inventor： Aleksandar ALEKSOV ,  Telesphor KAMGAING ,  Veronica STRONG ,  Georgios C. DOGIAMIS ,  Neelam PRABHU GAUNKAR

IPC: H01L23/498 ,  H01L23/15 ,  H01L21/48 ,  H01L23/00

Abstract: Embodiments disclosed herein include package substrates and methods of forming such package substrates. In an embodiment the package substrate comprises a core and buildup layers on the core. In an embodiment, first level interconnect (FLI) pads are on a topmost buildup layer, and the FLI pads have a pitch. In an embodiment, a plurality of vertically oriented planes are embedded in the core, and the vertically oriented planes are spaced at the pitch.

公开(公告)号：US20220408562A1

公开(公告)日：2022-12-22

申请号：US17349700

申请日：2021-06-16

Applicant: Intel Corporation

Inventor： Telesphor KAMGAING ,  Georgios C. DOGIAMIS ,  Neelam PRABHU GAUNKAR ,  Veronica STRONG ,  Aleksandar ALEKSOV

IPC: H05K1/11 ,  H05K1/03

Abstract: Embodiments disclosed herein include package substrates and methods of forming such package substrates. In an embodiment a package substrate comprises a glass core, and a vertically oriented inductor embedded in the glass core. In an embodiment, the inductor comprises vertical vias through the glass core, and where the vertical vias are electrically coupled together by conductive traces over a surface of the glass core to provide a plurality of conductive turns.

公开(公告)号：US20220407216A1

公开(公告)日：2022-12-22

申请号：US17354891

申请日：2021-06-22

Applicant: Intel Corporation

Inventor： Georgios C. DOGIAMIS ,  Telesphor KAMGAING ,  Neelam PRABHU GAUNKAR ,  Aleksandar ALEKSOV ,  Veronica STRONG

IPC: H01Q1/22 ,  H05K1/02 ,  H01Q9/04 ,  H01Q13/02 ,  H01L23/498 ,  H01L21/48

Abstract: Embodiments disclosed herein include package substrates with antennas on the core. In an embodiment, a package substrate comprises a core with a first surface and a second surface. In an embodiment, a first conductive plane is formed into the core, where the first conductive plane is substantially orthogonal to the first surface, and a second conductive plane is formed into the core, where the second conductive plane is substantially orthogonal to the first surface. In an embodiment, an antenna is on the core, where the antenna is between the first conductive plane and the second conductive plane.

公开(公告)号：US20220406617A1

公开(公告)日：2022-12-22

申请号：US17349673

申请日：2021-06-16

Applicant: Intel Corporation

Inventor： Veronica STRONG ,  Neelam PRABHU GAUNKAR ,  Telesphor KAMGAING ,  Georgios C. DOGIAMIS ,  Aleksandar ALEKSOV

IPC: H01L21/48 ,  H01L23/498

Abstract: Embodiments disclosed herein include a package substrate and methods of fabricating such package substrates. In an embodiment a package substrate comprises a core with a first surface and a second surface opposite from the first surface, and a via through the core. In an embodiment a first pad is over the via, and the first pad is embedded within the core with a third surface that is substantially coplanar with the first surface of the core. In an embodiment, a second pad is over the via, where the second pad is embedded within the core with a fourth surface that is substantially coplanar with the second surface of the core.