公开(公告)号：US11900114B2

公开(公告)日：2024-02-13

申请号：US17878427

申请日：2022-08-01

Applicant: Intel Corporation

Inventor： Elmoustapha Ould-Ahmed-Vall ,  William Rash ,  Subramaniam Maiyuran ,  Varghese George ,  Rajesh Sankaran

IPC: G06F9/30

CPC classification number: G06F9/30069 ,  G06F9/3001 ,  G06F9/30021 ,  G06F9/30083 ,  G06F9/30101

Abstract: Disclosed embodiments relate to systems and methods to skip inconsequential matrix operations. In one example, a processor includes decode circuitry to decode an instruction having fields to specify an opcode and locations of first source, second source, and destination matrices, the opcode indicating that the processor is to multiply each element at row M and column K of the first source matrix with a corresponding element at row K and column N of the second source matrix, and accumulate a resulting product with previous contents of a corresponding element at row M and column N of the destination matrix, the processor to skip multiplications that, based on detected values of corresponding multiplicands, would generate inconsequential results; scheduling circuitry to schedule execution of the instruction; and execution circuitry to execute the instructions as per the opcode.

公开(公告)号：US20170237797A1

公开(公告)日：2017-08-17

申请号：US15384294

申请日：2016-12-19

Applicant: Intel Corporation

Inventor： Bharath Muthiah ,  William Rash ,  Glenn Hinton ,  Martin G. Dixon ,  Scott Hahn ,  David Papworth

IPC: H04L29/06

Abstract: In one embodiment, Quality of Service (QoS) criteria based server side binary translation and execution of applications is performed on multiple servers utilizing distributed translation and execution in either a virtualized or native execution environment. The translated applications are executed to generate output display data, the output display data is encoded in a media format suitable for video streaming, and the video stream is delivered over a network to a client device. In one embodiment, one or more graphics processors assist the central processors of the servers by accelerating the rendering of the application output, and a media encoder encodes the application output into a media format.

公开(公告)号：US11748130B2

公开(公告)日：2023-09-05

申请号：US16456300

申请日：2019-06-28

Applicant: INTEL CORPORATION

Inventor： Rajesh Sankaran ,  Bret Toll ,  William Rash ,  Subramaniam Maiyuran ,  Gang Chen ,  Varghese George

IPC: G06F9/455 ,  G06F12/1009 ,  G06T1/20

CPC classification number: G06F9/45558 ,  G06F12/1009 ,  G06T1/20 ,  G06F2009/4557 ,  G06F2009/45583 ,  G06F2009/45591

Abstract: Graphics processing systems and methods are described. A graphics processing apparatus may comprise one or more graphics processing engines, a memory, a memory management unit (MMU) including a GPU second level page table and GPU dirty bit tracking, and a provisioning agent to receive a request from a virtual machine monitor (VMM) to provision a subcluster of graphics processing apparatuses, the subcluster including a plurality of graphics processing engines from a plurality of graphics processing apparatuses connected using a scale-up fabric, provision the scale-up fabric to route data within the subcluster of graphics processing apparatuses, and provision a plurality of resources on the graphics processing apparatus for the subcluster based on the request from the VMM.

公开(公告)号：US10469557B2

公开(公告)日：2019-11-05

申请号：US15384294

申请日：2016-12-19

Applicant: Intel Corporation

Inventor： Bharath Muthiah ,  William Rash ,  Glenn Hinton ,  Martin G. Dixon ,  Scott Hahn ,  David Papworth

IPC: H04L29/06

Abstract: In one embodiment, Quality of Service (QoS) criteria based server side binary translation and execution of applications is performed on multiple servers utilizing distributed translation and execution in either a virtualized or native execution environment. The translated applications are executed to generate output display data, the output display data is encoded in a media format suitable for video streaming, and the video stream is delivered over a network to a client device. In one embodiment, one or more graphics processors assist the central processors of the servers by accelerating the rendering of the application output, and a media encoder encodes the application output into a media format.

公开(公告)号：US12229581B2

公开(公告)日：2025-02-18

申请号：US18239489

申请日：2023-08-29

Applicant: INTEL CORPORATION

Inventor： Rajesh Sankaran ,  Bret Toll ,  William Rash ,  Subramaniam Maiyuran ,  Gang Chen ,  Varghese George

IPC: G06F9/455 ,  G06F12/1009 ,  G06T1/20

Abstract: Graphics processing systems and methods are described. A graphics processing apparatus may comprise one or more graphics processing engines, a memory, a memory management unit (MMU) including a GPU second level page table and GPU dirty bit tracking, and a provisioning agent to receive a request from a virtual machine monitor (VMM) to provision a subcluster of graphics processing apparatuses, the subcluster including a plurality of graphics processing engines from a plurality of graphics processing apparatuses connected using a scale-up fabric, provision the scale-up fabric to route data within the subcluster of graphics processing apparatuses, and provision a plurality of resources on the graphics processing apparatus for the subcluster based on the request from the VMM.