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    Generation of processor interrupts using averaged data
    1.
    发明授权
    Generation of processor interrupts using averaged data 有权

    公开(公告)号：US11016916B2

    公开(公告)日：2021-05-25

    申请号：US16868603

    申请日：2020-05-07

    Applicant: Intel Corporation

    Inventor： Xiuting C. Man ,  Jeremy J. Shrall ,  Deepak Ganapathy ,  Dorit Shapira

    IPC: G06F13/24 ,  G06F1/3296 ,  G06F1/20 ,  G06F1/3234

    Abstract: In an embodiment, a processor includes at least one execution unit to execute instructions, and an interrupt generation unit. The interrupt generation unit may be to: receive a plurality of values indicating thermal status values for a memory unit at multiple points in time across a first time window; determine a running average value based on the plurality of values indicating thermal status values in the memory unit; and in response to a determination that the running average value has exceeded a high thermal status threshold value, generate a thermal interrupt indicating a high thermal status event in the processor. Other embodiments are described and claimed.

    Generation of processor interrupts using averaged data
    2.
    发明授权
    Generation of processor interrupts using averaged data 有权

    公开(公告)号：US10657083B2

    公开(公告)日：2020-05-19

    申请号：US15281472

    申请日：2016-09-30

    Applicant: Intel Corporation

    Inventor： Xiuting C. Man ,  Jeremy J. Shrall ,  Deepak Ganapathy ,  Dorit Shapira

    IPC: G06F13/12 ,  G06F13/24 ,  G06F1/3296 ,  G06F1/20 ,  G06F1/3234

    Abstract: In an embodiment, a processor includes at least one execution unit to execute instructions, and an interrupt generation unit. The interrupt generation unit may be to: receive a plurality of values indicating thermal status values for a memory unit at multiple points in time across a first time window; determine a running average value based on the plurality of values indicating thermal status values in the memory unit; and in response to a determination that the running average value has exceeded a high thermal status threshold value, generate a thermal interrupt indicating a high thermal status event in the processor. Other embodiments are described and claimed.

    Power gating for termination power supplies
    4.
    发明授权
    Power gating for termination power supplies 有权
    电源门控端接电源

    公开(公告)号：US09507408B2

    公开(公告)日：2016-11-29

    申请号：US13629008

    申请日：2012-09-27

    Applicant: Intel Corporation

    Inventor： Xiuting C. Man ,  Christopher P. Mozak ,  Shaun M. Conrad ,  Jeffery L. Krieger ,  Philip R. Lehwalder ,  Inder M. Sodhi

    IPC: G06F1/00 ,  G06F1/26 ,  G06F1/32

    CPC classification number: G06F1/3296 ,  G06F1/3275 ,  G06F1/3287 ,  Y02D10/14 ,  Y02D10/171 ,  Y02D50/20

    Abstract: Power gating control architectures. A memory device having at least a memory array and input/output (I/O) lines terminated on the memory device with termination circuitry coupled to receive a termination supply voltage (Vtt) with power gating circuitry to selectively gate the termination supply voltage in response to a power gating control signal (VttControl) is coupled with a processing core coupled with the memory device, the processing core to selectively assert and deassert the VttControl signal.

    Abstract translation: 电力门控控制架构。 存储器件具有至少存储器阵列和终端于存储器件上的输入/输出（I / O）线，其中终端电路被耦合以用电源门控电路接收终端电源电压（Vtt），以响应于选择性地对终端电源电压进行选通 电力门控控制信号（VttControl）与与存储器件耦合的处理核心耦合，处理核心选择性地断言和解除VttControl信号。

    Compensation control for variable power rails
    5.
    发明授权
    Compensation control for variable power rails 有权

    公开(公告)号：US10754404B2

    公开(公告)日：2020-08-25

    申请号：US15281299

    申请日：2016-09-30

    Applicant: Intel Corporation

    Inventor： Xiuting C. Man ,  Amir Ali Radjai ,  Jeremy J. Shrall

    IPC: G06F1/28 ,  G05F1/625 ,  G06F1/30

    Abstract: In an embodiment, a processor includes a first power rail, a first component coupled to the first power rail, and a compensation control unit. The compensation control unit is to: detect a request to change a voltage level of the first power rail by a first voltage change amount; in response to detecting the request, determine that the first voltage change amount exceeds a first threshold level associated with the first component; and in response to determining that the first voltage change amount exceeds the first threshold level, initiate a first compensation action prior to changing the voltage level of the first power rail. Other embodiments are described and claimed.

    Apparatuses, methods, and systems for package on package memory refresh and self-refresh rate management
    6.
    发明授权
    Apparatuses, methods, and systems for package on package memory refresh and self-refresh rate management 有权

    公开(公告)号：US10083735B2

    公开(公告)日：2018-09-25

    申请号：US15496483

    申请日：2017-04-25

    Applicant: Intel Corporation

    Inventor： Xiuting C. Man ,  Stanley S. Kulick

    IPC: G11C7/04 ,  G11C11/406 ,  G06F15/78

    CPC classification number: G11C11/40626 ,  G06F15/786 ,  G11C11/40615

    Abstract: Methods, systems, and apparatuses relating to package on package memory refresh and self-refresh rate management are described. In one embodiment, an apparatus includes a processor die, a dynamic memory die mounted to and overlapping the processor die, a first thermal sensor of the processor die disposed adjacent to a first hot spot from a first type of workload and a second thermal sensor of the processor die disposed adjacent to a second hot spot from a second type of workload, and a hardware control circuit of the processor die to cause a refresh of a capacitor of the dynamic memory die when either of an output of the first thermal sensor exceeds a first threshold value and an output of the second thermal sensor exceeds a second threshold value.

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