公开(公告)号：US09412685B2

公开(公告)日：2016-08-09

申请号：US14099288

申请日：2013-12-06

Applicant: J-DEVICES CORPORATION

Inventor： Yoshiyuki Tomonaga ,  Mitsuru Ooida ,  Katsumi Watanabe ,  Hidenari Sato

IPC: H01L21/44 ,  H01L23/495 ,  H01L23/31 ,  H01L23/433 ,  H01L21/56 ,  H01L23/00

CPC classification number: H01L23/49568 ,  H01L21/56 ,  H01L21/565 ,  H01L23/3128 ,  H01L23/3135 ,  H01L23/4334 ,  H01L24/29 ,  H01L24/32 ,  H01L24/45 ,  H01L24/48 ,  H01L24/49 ,  H01L24/73 ,  H01L2224/05554 ,  H01L2224/2919 ,  H01L2224/32225 ,  H01L2224/45144 ,  H01L2224/45147 ,  H01L2224/4813 ,  H01L2224/48227 ,  H01L2224/49175 ,  H01L2224/73215 ,  H01L2224/73265 ,  H01L2924/00014 ,  H01L2924/10162 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/00012 ,  H01L2924/00 ,  H01L2224/85399 ,  H01L2224/05599

Abstract: A semiconductor device having a substrate including a plurality of external terminals on a rear surface and a plurality of bonding terminals electrically connected to the plurality of external terminals on a front surface, a semiconductor chip mounted on the front surface of the substrate, a surface of the chip including a plurality of bonding pads, a plurality of bonding wires connecting between the plurality of bonding pads or between the plurality of bonding terminals and the plurality of bonding wires respectively, a first sealing layer sealing the front surface of the substrate, the plurality of bonding wires and the semiconductor chip, and a second sealing layer comprised of the same material as the first sealing, the second sealing layer being formed above the first sealing layer.

Abstract translation: 一种半导体器件，具有在后表面上具有多个外部端子的基板和与前表面上的多个外部端子电连接的多个接合端子，安装在基板的前表面上的半导体芯片， 所述芯片包括多个接合焊盘，多个接合线，分别连接在所述多个接合焊盘之间或者在所述多个接合端子和所述多个接合线之间，密封所述衬底的前表面的第一密封层， 的接合线和半导体芯片，以及由与第一密封件相同的材料构成的第二密封层，第二密封层形成在第一密封层的上方。

公开(公告)号：US20140159215A1

公开(公告)日：2014-06-12

申请号：US14099288

申请日：2013-12-06

Applicant: J-DEVICES CORPORATION

Inventor： Yoshiyuki Tomonaga ,  Mitsuru Ooida ,  Katsumi Watanabe ,  Hidenari Sato

IPC: H01L23/495 ,  H01L21/56

CPC classification number: H01L23/49568 ,  H01L21/56 ,  H01L21/565 ,  H01L23/3128 ,  H01L23/3135 ,  H01L23/4334 ,  H01L24/29 ,  H01L24/32 ,  H01L24/45 ,  H01L24/48 ,  H01L24/49 ,  H01L24/73 ,  H01L2224/05554 ,  H01L2224/2919 ,  H01L2224/32225 ,  H01L2224/45144 ,  H01L2224/45147 ,  H01L2224/4813 ,  H01L2224/48227 ,  H01L2224/49175 ,  H01L2224/73215 ,  H01L2224/73265 ,  H01L2924/00014 ,  H01L2924/10162 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/00012 ,  H01L2924/00 ,  H01L2224/85399 ,  H01L2224/05599

Abstract: A semiconductor device having a substrate including a plurality of external terminals on a rear surface and a plurality of bonding terminals electrically connected to the plurality of external terminals on a front surface, a semiconductor chip mounted on the front surface of the substrate, a surface of the chip including a plurality of bonding pads, a plurality of bonding wires connecting between the plurality of bonding pads or between the plurality of bonding terminals and the plurality of bonding wires respectively, a first sealing layer sealing the front surface of the substrate, the plurality of bonding wires and the semiconductor chip, and a second sealing layer comprised of the same material as the first sealing, the second sealing layer being formed above the first sealing layer.

Abstract translation: 一种半导体器件，具有在后表面上具有多个外部端子的基板和与前表面上的多个外部端子电连接的多个接合端子，安装在基板的前表面上的半导体芯片， 所述芯片包括多个接合焊盘，多个接合线，分别连接在所述多个接合焊盘之间或者在所述多个接合端子和所述多个接合线之间，密封所述衬底的前表面的第一密封层， 的接合线和半导体芯片，以及由与第一密封件相同的材料构成的第二密封层，第二密封层形成在第一密封层的上方。