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公开(公告)号:US09418944B2
公开(公告)日:2016-08-16
申请号:US14739829
申请日:2015-06-15
Applicant: J-DEVICES CORPORATION
Inventor: Kiyoaki Hashimoto , Yasuyuki Takehara
IPC: H01L23/00 , H01L23/544 , H01L23/36 , H01L23/373 , H01L21/48 , H01L23/31 , H01L21/56 , H01L23/498
CPC classification number: H01L23/562 , H01L21/4857 , H01L21/4882 , H01L21/561 , H01L21/565 , H01L21/568 , H01L23/3128 , H01L23/36 , H01L23/3735 , H01L23/49816 , H01L23/5389 , H01L23/544 , H01L24/02 , H01L24/13 , H01L24/19 , H01L24/97 , H01L25/0655 , H01L2223/54426 , H01L2223/54486 , H01L2224/0224 , H01L2224/02315 , H01L2224/02331 , H01L2224/02373 , H01L2224/02379 , H01L2224/0239 , H01L2224/04105 , H01L2224/12105 , H01L2224/13024 , H01L2224/32225 , H01L2224/32245 , H01L2224/73267 , H01L2224/92244 , H01L2224/97 , H01L2924/01029 , H01L2924/3511 , H01L2224/83 , H01L2224/82
Abstract: A semiconductor package includes a support substrate; a stress relaxation layer provided on a main surface of the support substrate; a semiconductor device located on the stress relaxation layer; an encapsulation material covering the semiconductor device, the encapsulation material being formed of an insulating material different from that of the stress relaxation layer; a line running through the encapsulation material and electrically connected to the semiconductor device; and an external terminal electrically connected to the line. Where the support substrate has an elastic modulus of A, the stress relaxation layer has an elastic modulus of B, and the encapsulation material has an elastic modulus of C under a same temperature condition, the relationship of A>C>B or C>A>B is obtained.
Abstract translation: 半导体封装包括支撑衬底; 设置在所述支撑基板的主表面上的应力松弛层; 位于应力松弛层上的半导体器件; 覆盖半导体器件的封装材料,封装材料由与应力松弛层不同的绝缘材料形成; 穿过封装材料并电连接到半导体器件的线; 以及与该线路电连接的外部端子。 在支撑基板具有A的弹性模量的情况下,应力松弛层的弹性模量为B,封装材料在相同的温度条件下具有C的弹性模量,A> C> B或C> A的关系 > B。
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公开(公告)号:US10553456B2
公开(公告)日:2020-02-04
申请号:US15472387
申请日:2017-03-29
Applicant: J-DEVICES CORPORATION
Inventor: Yasuyuki Takehara , Kazuhiko Kitano
IPC: H01L21/56 , H01L23/29 , H01L23/14 , H01L23/13 , H01L21/48 , H01L23/31 , H01L23/00 , H01L21/768 , H01L23/544 , H01L23/492
Abstract: A semiconductor package includes a substrate having at least one recessed portion, a semiconductor device located on a surface of the substrate, the surface having the at least one recessed portion, and a resin insulating layer covering the semiconductor device.
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公开(公告)号:US09786611B2
公开(公告)日:2017-10-10
申请号:US15235439
申请日:2016-08-12
Applicant: J-DEVICES CORPORATION
Inventor: Kiyoaki Hashimoto , Yasuyuki Takehara
IPC: H01L21/00 , H01L23/00 , H01L23/544 , H01L23/36 , H01L23/373 , H01L21/48 , H01L23/31 , H01L21/56 , H01L23/538 , H01L23/498 , H01L25/065
CPC classification number: H01L23/562 , H01L21/4857 , H01L21/4882 , H01L21/561 , H01L21/565 , H01L21/568 , H01L23/3128 , H01L23/36 , H01L23/3735 , H01L23/49816 , H01L23/5389 , H01L23/544 , H01L24/02 , H01L24/13 , H01L24/19 , H01L24/97 , H01L25/0655 , H01L2223/54426 , H01L2223/54486 , H01L2224/0224 , H01L2224/02315 , H01L2224/02331 , H01L2224/02373 , H01L2224/02379 , H01L2224/0239 , H01L2224/04105 , H01L2224/12105 , H01L2224/13024 , H01L2224/32225 , H01L2224/32245 , H01L2224/73267 , H01L2224/92244 , H01L2224/97 , H01L2924/01029 , H01L2924/3511 , H01L2224/83 , H01L2224/82
Abstract: A semiconductor package includes a support substrate; a stress relaxation layer provided on a main surface of the support substrate; a semiconductor device located on the stress relaxation layer; an encapsulation material covering the semiconductor device, the encapsulation material being formed of an insulating material different from that of the stress relaxation layer; a line running through the encapsulation material and electrically connected to the semiconductor device; and an external terminal electrically connected to the line. Where the support substrate has an elastic modulus of A, the stress relaxation layer has an elastic modulus of B, and the encapsulation material has an elastic modulus of C under a same temperature condition, the relationship of A>C>B or C>A>B is obtained.
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