公开(公告)号：US20180174975A1

公开(公告)日：2018-06-21

申请号：US15884979

申请日：2018-01-31

Applicant: J-Devices Corporation

Inventor： Toshiyuki INAOKA ,  Yuichiro YOSHIKAWA ,  Atsuhiro URATSUJI ,  Katsushi YOSHIMITSU

IPC: H01L23/538 ,  H01L23/00 ,  H01L23/367 ,  H01L21/56

CPC classification number: H01L21/4871 ,  H01L21/561 ,  H01L21/568 ,  H01L23/3128 ,  H01L23/3675 ,  H01L23/5389 ,  H01L24/24 ,  H01L2224/04105 ,  H01L2224/12105 ,  H01L2224/24137 ,  H01L2224/92244 ,  H01L2924/15153 ,  H01L2924/15747

Abstract: An object of the present invention is to provide a semiconductor package with which it is possible to reduce a volume of an encapsulation resin and to easily embed a resin regardless of thicknesses of semiconductor chips and a small distance between adjacent semiconductor chips, as well as to provide a thin semiconductor package with which a final product includes no support flat plate. To realize this, a semiconductor package having a structure wherein semiconductor chips are accommodated in cavity parts of a support which is formed by copper plating and includes the cavity parts is provided.

公开(公告)号：US20170317045A1

公开(公告)日：2017-11-02

申请号：US15481848

申请日：2017-04-07

Applicant: J-DEVICES CORPORATION

Inventor： Toshiyuki INAOKA ,  Atsuhiro URATSUJI

IPC: H01L23/00

CPC classification number: H01L24/27 ,  H01L24/04 ,  H01L24/11 ,  H01L24/19 ,  H01L24/20 ,  H01L24/64 ,  H01L24/97 ,  H01L2223/54426 ,  H01L2224/03001 ,  H01L2224/03618 ,  H01L2224/03632 ,  H01L2224/04105 ,  H01L2224/12105 ,  H01L2224/2919 ,  H01L2224/32225 ,  H01L2224/32245 ,  H01L2224/73267 ,  H01L2224/8201 ,  H01L2224/82039 ,  H01L2224/83132 ,  H01L2224/83192 ,  H01L2224/92244 ,  H01L2224/97 ,  H01L2924/1432 ,  H01L2924/1434 ,  H01L2924/1461 ,  H01L2924/15159 ,  H01L2224/83

Abstract: A manufacturing method of a semiconductor package includes locating, on a substrate, a semiconductor device having an external terminal provided on a top surface thereof, forming a resin insulating layer covering the semiconductor device, forming an opening, exposing the external terminal, in the resin insulating layer, performing plasma treatment on a bottom surface of the opening, performing chemical treatment on the bottom surface of the opening after the plasma treatment, and forming a conductive body to be connected with the external terminal exposed in the opening.

公开(公告)号：US20170373012A1

公开(公告)日：2017-12-28

申请号：US15585659

申请日：2017-05-03

Applicant: J-Devices Corporation

Inventor： Toshiyuki INAOKA ,  Yuichiro YOSHIKAWA ,  Atsuhiro URATSUJI ,  Katsushi YOSHIMITSU

IPC: H01L23/538 ,  H01L21/56 ,  H01L23/00

CPC classification number: H01L21/4871 ,  H01L21/561 ,  H01L21/568 ,  H01L23/3128 ,  H01L23/3675 ,  H01L23/5389 ,  H01L24/24 ,  H01L2224/04105 ,  H01L2224/12105 ,  H01L2224/18 ,  H01L2224/24137 ,  H01L2224/73267 ,  H01L2224/92244 ,  H01L2924/15153 ,  H01L2924/15747

Abstract: An object of the present invention is to provide a semiconductor package with which it is possible to reduce a volume of an encapsulation resin and to easily embed a resin regardless of thicknesses of semiconductor chips and a small distance between adjacent semiconductor chips, as well as to provide a thin semiconductor package with which a final product includes no support flat plate. To realize this, a semiconductor package having a structure wherein semiconductor chips are accommodated in cavity parts of a support which is formed by copper plating and includes the cavity parts is provided.