METHODS AND SYSTEMS FOR IMPROVED LOCALIZED FEATURE QUANTIFICATION IN SURFACE METROLOGY TOOLS
    1.
    发明申请
    METHODS AND SYSTEMS FOR IMPROVED LOCALIZED FEATURE QUANTIFICATION IN SURFACE METROLOGY TOOLS 审中-公开
    用于改进表面计量工具中的本地化特征量化的方法和系统

    公开(公告)号:WO2012094421A2

    公开(公告)日:2012-07-12

    申请号:PCT/US2012/020225

    申请日:2012-01-04

    CPC classification number: G06T5/002 G06T5/20 G06T7/0004 G06T2207/30148

    Abstract: A method for enabling more accurate measurements of localized features on wafers is disclosed. The method includes: a) performing high order surface fitting to more effectively remove the low frequency shape components and also to reduce possible signal attenuations commonly observed from filtering; b) constructing and applying a proper two dimensional LFM window to the residual image from the surface fitting processing stage to effectively reduce the residual artifacts at the region boundaries; c) calculating the metrics of the region using the artifact-reduced image to obtain more accurate and reliable measurements; and d) using site-based metrics obtained from front and back surface data to quantify the features of interest. A method for filtering data from measurements of localized features on wafers is disclosed. This method includes an algorithm designed to adjust the filtering behavior according to the statistics of extreme data samples. A method for utilizing the 2D window and the data filtering to yield a more robust and more accurate Localized Feature quantification methodology is disclosed.

    Abstract translation: 公开了一种能够更精确地测量晶片上局部特征的方法。 该方法包括:a)执行高阶表面拟合以更有效地去除低频形状分量,并且还可以减少通常从滤波观察到的可能的信号衰减; b)从表面拟合处理阶段构造和应用适当的二维LFM窗口到残余图像,以有效地减少区域边界处的残余伪像; c)使用伪影图像计算该区域的度量以获得更准确和可靠的测量; 以及d)使用从前面和背面数据获得的基于站点的度量来量化感兴趣的特征。 公开了一种用于从晶片上的局部特征的测量中滤出数据的方法。 该方法包括根据极端数据样本统计来调整过滤行为的算法。 公开了一种利用2D窗口和数据过滤产生更强大和更准确的局部特征量化方法的方法。

    PREDICTING AND CONTROLLING CRITICAL DIMENSION ISSUES AND PATTERN DEFECTIVITY IN WAFERS USING INTERFEROMETRY
    2.
    发明申请
    PREDICTING AND CONTROLLING CRITICAL DIMENSION ISSUES AND PATTERN DEFECTIVITY IN WAFERS USING INTERFEROMETRY 审中-公开
    使用干涉法预测和控制轮廓中的关键尺寸问题和图案缺陷

    公开(公告)号:WO2016089786A1

    公开(公告)日:2016-06-09

    申请号:PCT/US2015/063032

    申请日:2015-11-30

    Abstract: Systems and methods for predicting and controlling pattern quality data (e.g., critical dimension and/or pattern defectivity) in patterned wafers using patterned wafer geometry (PWG) measurements are disclosed. Correlations between PWG measurements and pattern quality data measurements may be established, and the established correlations may be utilized to provide pattern quality data predictions for a given wafer based on geometry measurements obtained for the give wafer. The predictions produced may be provided to a lithography tool, which may utilize the predictions to correct focus and/or title errors that may occur during the lithography process.

    Abstract translation: 公开了使用图案化晶片几何(PWG)测量来在图案化晶片中预测和控制图案质量数据(例如临界尺寸和/或图案缺陷率)的系统和方法。 可以建立PWG测量和模式质量数据测量之间的相关性,并且可以利用所建立的相关性来基于为给定晶片获得的几何测量为给定晶片提供图案质量数据预测。 可以将所产生的预测提供给光刻工具,光刻工具可以利用预测来校正在光刻工艺期间可能发生的焦点和/或标题误差。

    PREDICTIVE MODELING BASED FOCUS ERROR PREDICTION
    3.
    发明申请
    PREDICTIVE MODELING BASED FOCUS ERROR PREDICTION 审中-公开
    基于预测模型的焦点误差预测

    公开(公告)号:WO2016025037A1

    公开(公告)日:2016-02-18

    申请号:PCT/US2015/027254

    申请日:2015-04-23

    Abstract: Predictive modeling based focus error prediction method and system are disclosed. The method includes obtaining wafer geometry measurements of a plurality of training wafers and grouping the plurality of training wafers to provide at least one training group based on relative homogeneity of wafer geometry measurements among the plurality of training wafers. For each particular training group of the at least one training group, a predictive model is develop utilizing non-linear predictive modeling. The predictive model establishes correlations between wafer geometry parameters and focus error measurements obtained for each wafer within that particular training group, and the predictive model can be utilized to provide focus error prediction for an incoming wafer belonging to that particular training group.

    Abstract translation: 公开了基于预测建模的聚焦误差预测方法和系统。 该方法包括获得多个训练晶片的晶片几何测量,并且基于多个训练晶片之间的晶片几何测量的相对均匀性,分组多个训练晶片以提供至少一个训练组。 对于至少一个训练组的每个特定训练组,利用非线性预测建模来开发预测模型。 该预测模型建立晶片几何参数和该特定训练组内的每个晶片获得的聚焦误差测量值之间的相关性,并且该预测模型可用于为属于该特定训练组的输入晶片提供聚焦误差预测。

    PATTERNED WAFER GEOMETRY MEASUREMENTS FOR SEMICONDUCTOR PROCESS CONTROLS
    4.
    发明申请
    PATTERNED WAFER GEOMETRY MEASUREMENTS FOR SEMICONDUCTOR PROCESS CONTROLS 审中-公开
    用于半导体工艺控制的图形波形几何测量

    公开(公告)号:WO2015199801A1

    公开(公告)日:2015-12-30

    申请号:PCT/US2015/027182

    申请日:2015-04-23

    CPC classification number: H01L22/12 H01L22/20

    Abstract: Wafer geometry measurement tools and methods for providing improved wafer geometry measurements are disclosed. Wafer front side, backside and flatness measurements are taken into consideration for semiconductor process control. The measurement tools and methods in accordance with embodiments of the present disclosure are suitable for handling any types of wafers, including patterned wafers, without the shortcomings of conventional metrology systems.

    Abstract translation: 公开了用于提供改进的晶片几何测量的晶片几何测量工具和方法。 考虑半导体工艺控制时的晶片正面,背面和平坦度测量。 根据本公开的实施例的测量工具和方法适用于处理任何类型的晶片,包括图案化晶片,而没有传统测量系统的缺点。

    PROCESS-INDUCED DISTORTION PREDICTION AND FEEDFORWARD AND FEEDBACK CORRECTION OF OVERLAY ERRORS
    5.
    发明申请
    PROCESS-INDUCED DISTORTION PREDICTION AND FEEDFORWARD AND FEEDBACK CORRECTION OF OVERLAY ERRORS 审中-公开
    过程诱导失败预测和反馈纠正和反馈纠正重叠错误

    公开(公告)号:WO2015066232A1

    公开(公告)日:2015-05-07

    申请号:PCT/US2014/062992

    申请日:2014-10-29

    Abstract: Systems and methods for prediction and measurement of overlay errors are disclosed. Process-induced overlay errors may be predicted or measured utilizing film force based computational mechanics models. More specifically, information with respect to the distribution of film force is provided to a finite element (FE) model to provide more accurate point-by-point predictions in cases where complex stress patterns are present. Enhanced prediction and measurement of wafer geometry induced overlay errors are also disclosed.

    Abstract translation: 公开了用于预测和测量重叠误差的系统和方法。 可以使用基于薄膜力的计算力学模型来预测或测量过程引起的重叠误差。 更具体地,关于膜力的分布的信息被提供给有限元(FE)模型,以在存在复应力模式的情况下提供更准确的逐点预测。 还公开了晶片几何感应重叠误差的增强预测和测量。

    METHODS AND SYSTEMS FOR IMPROVED LOCALIZED FEATURE QUANTIFICATION IN SURFACE METROLOGY TOOLS
    6.
    发明公开
    METHODS AND SYSTEMS FOR IMPROVED LOCALIZED FEATURE QUANTIFICATION IN SURFACE METROLOGY TOOLS 审中-公开
    方法和系统改进的属地化特征量化与表面测量工具

    公开(公告)号:EP2661769A2

    公开(公告)日:2013-11-13

    申请号:EP12732237.8

    申请日:2012-01-04

    CPC classification number: G06T5/002 G06T5/20 G06T7/0004 G06T2207/30148

    Abstract: A method for enabling more accurate measurements of localized features on wafers is disclosed. The method includes: a) performing high order surface fitting to more effectively remove the low frequency shape components and also to reduce possible signal attenuations commonly observed from filtering; b) constructing and applying a proper two dimensional LFM window to the residual image from the surface fitting processing stage to effectively reduce the residual artifacts at the region boundaries; c) calculating the metrics of the region using the artifact-reduced image to obtain more accurate and reliable measurements; and d) using site-based metrics obtained from front and back surface data to quantify the features of interest. A method for filtering data from measurements of localized features on wafers is disclosed. This method includes an algorithm designed to adjust the filtering behavior according to the statistics of extreme data samples. A method for utilizing the 2D window and the data filtering to yield a more robust and more accurate Localized Feature quantification methodology is disclosed.

    PATTERNED WAFER GEOMETRY MEASUREMENTS FOR SEMICONDUCTOR PROCESS CONTROLS
    9.
    发明公开
    PATTERNED WAFER GEOMETRY MEASUREMENTS FOR SEMICONDUCTOR PROCESS CONTROLS 审中-公开
    MESSUNGEN VON STRUKTURIERTER WAFERGEETTREFÜRHALBLEITERPROZESSSTEUERUNGEN

    公开(公告)号:EP3117454A1

    公开(公告)日:2017-01-18

    申请号:EP15811731.7

    申请日:2015-04-23

    Abstract: Wafer geometry measurement tools and methods for providing improved wafer geometry measurements are disclosed. Wafer front side, backside and flatness measurements are taken into consideration for semiconductor process control. The measurement tools and methods in accordance with embodiments of the present disclosure are suitable for handling any types of wafers, including patterned wafers, without the shortcomings of conventional metrology systems.

    Abstract translation: 公开了用于提供改进的晶片几何测量的晶片几何测量工具和方法。 考虑半导体工艺控制的晶片前侧,背面和平坦度测量。 根据本公开的实施例的测量工具和方法适用于处理包括图案化晶片的任何类型的晶片,而不存在传统测量系统的缺点。

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