公开(公告)号：JPH09181314A

公开(公告)日：1997-07-11

申请号：JP21554396

申请日：1996-08-15

Applicant: KOREA ELECTRONICS TELECOMM

Inventor： JIYONHO RII ,  UONGU KAN ,  JIYONSUN RIYUU

IPC: H01L29/78 ,  H01L21/335 ,  H01L21/336

Abstract: PROBLEM TO BE SOLVED: To highly integrate a semiconductor device by a method wherein a gate electrode is made to self-align with a channel region, and at the same time the width of the gate electrode is minimized. SOLUTION: A second aperture 16 is formed in such a way that the upper part of a channel formation region is exposed, a polysilicon film 18 is deposited on the front surface of a nitride film 13, this polysilicon film 18 is pattered to make the polysilicon film 18 remain only in the interior of the aperture 16 and this remained polysilicon film 18 is formed on a gate electrode 21 so that the electrode 20 may be self-aligned with a channel region. This can realized that the width of a gate electrode 20 is minimized.