公开(公告)号：JPH05136017A

公开(公告)日：1993-06-01

申请号：JP12345692

申请日：1992-05-15

Applicant: KOREA ELECTRONICS TELECOMM

Inventor： SAN UON KAN ,  KIYON SOO RII

IPC: H01L21/02 ,  H01L21/20 ,  H01L21/76 ,  H01L21/8252 ,  H01L29/84

Abstract: PURPOSE: To reduce interface stress that is generated between substrates, due to the difference in thermal coefficient of expansion at the time of heat treatment by forming a plurality of grooves vertically and horizontally, forming a second low-temperature silicon oxide film at the sidewall of the grooves, and performing the adhesion thermal treatment to a single-crystal silicon for a polycrystalline silicon film. CONSTITUTION: A compound semiconductor layer 2 and a compound semiconductor layer 3 for forming an element are subjected to epitaxial growth on a compound semiconductor substrate 1. A low-temperature silicon oxide film 4 and a polycrystalline silicon oxide film 5 are successively laminated on the compound semiconductor layer 3 for forming an element, and a groove 6 reaching the compound semiconductor substrate 1 is formed vertically and horizontally. The sidewall of the groove 6 is covered with a low-temperature silicon oxide film 7a, and adhesion heat treatment is performed to the polycrystalline silicon film 5 and a single-crystal silicon substrate 8. In this case, a space formed inside the groove absorbs a stress that is generated, due to the difference in thermal coefficients of expansion between the compound semiconductor substrate the compound semiconductor layer, and the single-crystal silicon substrate.