公开(公告)号：NL1010905C2

公开(公告)日：2004-05-03

申请号：NL1010905

申请日：1998-12-24

Applicant: KOREA ELECTRONICS TELECOMM

Inventor： LEE JIN HYO ,  RHEE HEUNG-SOO ,  YU HYUN KYU ,  KIM BO WOO ,  NAM KEE SOO

IPC: H01L21/76 ,  H01L21/763 ,  H01L21/822 ,  H01L27/04 ,  H01L27/08 ,  H01L21/02

公开(公告)号：FR2728393A1

公开(公告)日：1996-06-21

申请号：FR9415684

申请日：1994-12-20

Applicant: KOREA ELECTRONICS TELECOMM

Inventor： LEE KYU HONG ,  LEE JIN HYO

IPC: H01L21/331 ,  H01L29/10 ,  H01L29/732

Abstract: Disclosed is a pillar bipolar transistor which has a bidirectional operation characteristic and in which a parasitic junction capacitance of a base electrode, and a method for fabricating the transistor comprises etching a substrate using a first patterned insulating layer as a mask to form first and second pillarss separated by a trench therein; injecting an impurity using a mask to form a collector under the first and second pillars and in the second pillar; depositing a first oxide layer and a first polysilicon layer thereon; polishing the first polysilicon layer using the first oxide layer as a polishing stopper; removing a portion of the first polysilicon layer and a portion of the first oxide layer to define an extrinsic base; etching the oxide layer formed on both sides of the first pillar to a predetermined depth to define a connecting portion and forming a buried polysilicon therein to form the connecting portion; depositing a second oxide layer and a second polysilicon layer thereon; polishing the second polysilicon layer using the second oxide layer as a polishing stopper; removing only the second oxide layer formed upward the first pillar to expose a surface of the first pillar; injecting an impurity in the first pillar to form a base at a center portion thereof; injecting an impurity to form an emitter at an upper portion of the first pillar; depositing a third polysilicon layer on the emitter, the third polysilicon layer being formed wider than the emitter; and forming self-aligned contact holes to form electrodes through the contact holes.

公开(公告)号：NL1010905A1

公开(公告)日：1999-06-29

申请号：NL1010905

申请日：1998-12-24

Applicant: KOREA ELECTRONICS TELECOMM

Inventor： LEE JIN HYO ,  RHEE HEUNG-SOO ,  YU HYUN KYU ,  KIM BO WOO ,  NAM KEE SOO

IPC: H01L21/76 ,  H01L21/763 ,  H01L21/822 ,  H01L27/04 ,  H01L27/08 ,  H01L21/82 ,  C23C8/04 ,  C23C18/08 ,  H01L29/86

Abstract: The present invention relates to a on silicon substrate, specifically to an inductor device and manufacturing method thereof for enhancing the quality factor of the inductor by disposing trenches on a silicon substratre, and by filling the inside of the trenches with polycrystalline polysilicon not doped with impurities. The present invention provides an inductor device and a manufacturing method thereof which can improve the quality factor by increasing resistance of the substrate by forming deep trenches disposed in specific patterns on a low-resistance silicon substrate and filling polycrystalline silicon not doped with impurities, and by reducing parasitic capacitance between the inductor and the silicon substrate.