公开(公告)号：JPH0621099A

公开(公告)日：1994-01-28

申请号：JP34420292

申请日：1992-12-24

Applicant: KOREA ELECTRONICS TELECOMM

Inventor： RI KEIKOU ,  CHIYOU KOUYOKU ,  RI YUUTAKU

IPC: H01L29/812 ,  H01L21/22 ,  H01L21/225 ,  H01L21/265 ,  H01L21/338

Abstract: PURPOSE: To provide a manufacturing method of MESFET for improving operating characteristics by lowering the contact resistance of an ohmic electrode and gating a metal of similarly low specific resistance, in spite of its heat resistance. CONSTITUTION: A silicon membrane 202 is formed on a semi-insulated semiconductor wafer 201, and after a channel region has been defined on a photosensitive film 203, an n-type impurity is injected into primary ions. After an ohmic electrode junction region is defined on a photosensitive film 203a by n - lithography for high-density doping, secondary ion implantation is performed. The photosensitive film 203a and the silicon membrane 202 are successively removed, and after the pattern of the ohmic electrode has been formed by the photosensitive film for the photolithography of a mask for the ohmic electrode, a damaged region is removed by performing recess etching of a wafer surface so that a gate can be formed. After a pattern has been formed for lithography for using the mask for the gate, a step is included for forming the gate by removing the damaged region by performing the recess etching of the wafer surface.

公开(公告)号：JPH05226598A

公开(公告)日：1993-09-03

申请号：JP31476492

申请日：1992-11-25

Applicant: KOREA ELECTRONICS TELECOMM

Inventor： GO MITSUTATSU ,  RI YUUTAKU

IPC: H01L27/14 ,  H01L21/8252 ,  H01L27/095 ,  H01L27/144 ,  H01L31/10 ,  H01L31/105 ,  H01L31/18

Abstract: PURPOSE: To provide a photoelectric integration device for reception and its manufacture by which reception sensitivity, high-speed operation and reliability can be improved, packaging process can be simplified and the manufacturing cost can be reduced. CONSTITUTION: A photoelectric integration device comprises a photosensor and a transistor formed on a substrate. The photosensor comprises an n-type channel layer (n-InGaAs), an etching-blocking layer (u-Inp), and an absorbing layer (u-InGaAs) which are formed as mesa-types on a part of a semi-insulating substrate (S, I-INP) which is etched up to a specified depth. A transistor comprises an n-type channel layer (n-InGaAs), an etching-blocking layer (u-Inp), and a p-type InP layer which are formed as reverse mesa-type on a part of the semi-insulating substrate which is not etched.