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    Prodn. of high temp. superconducting FET
    1.
    发明专利
    Prodn. of high temp. superconducting FET 未知

    公开(公告)号：DE4442688C1

    公开(公告)日：1996-06-27

    申请号：DE4442688

    申请日：1994-11-30

    Applicant: KOREA ELECTRONICS TELECOMM

    Inventor： SUNG GUN-YONG ,  SUH JEONG-DAE

    IPC: H01L39/22 ,  H01L39/02 ,  H01L39/14 ,  H01L39/24 ,  C04B35/505

    Abstract: Prodn. of high temp. superconducting FET comprises: (a) preparing an oxidic crystalline substrate (30); (b) depositing a template layer (32) on one main surface of the substrate using an impulse laser deposition appts.; (c) forming a YBa2Cu3O7-x layer (34), whose alpha -axis is vertical to the substrate, on the template layer; (d) providing the YBa2Cu3O77-x layer with a pattern to form a patterned YBa2Cu3O7-x layer with an opening (35) and to expose a surface part of the template layer; (e) depositing the YBa2Cu3O-7-x channel layer (36) on the surface part of the template layer and over the patterned YBa2Cu3O7-x layer so that the channel layer has a thickness of 60-100 nm and its alpha -axis is vertical to the substrate; (f) subsequently forming a SrTiO3 protective layer (38) and a SrTiO3 insulating layer (40) on the YBa2Cu3O7-x channel layer; (g) dry etching back parts of the insulating layer and the protective layer using an etching mask to expose the YBa2Cu3O7-x channel layer; (h) forming source-drain electrodes (44, 46) on both parts of the channel layer and subsequently forming a gate electrode (42) on the SrTiO3 insulating layer in the opening.

    4.
    发明专利
    未知

    公开(公告)号：DE4443800C2

    公开(公告)日：1996-11-14

    申请号：DE4443800

    申请日：1994-12-08

    Applicant: KOREA ELECTRONICS TELECOMM

    Inventor： SUH JEONG-DAE ,  SUNG GUN-YONG

    IPC: H01L39/00 ,  H01L29/78 ,  H01L39/22 ,  H01L39/24 ,  H01L39/14 ,  C04B35/505

    Abstract: Disclosed is a method for making a superconducting field-effect device with a grain boundary channel, the method comprising the steps of depositing a first superconducting thin film on a substrate; patterning the first superconducting thin film to form a patterned superconducting thin film having an opening; depositing a template layer thereon; selectively etching back the template layer to form a patterned template layer; growing a second superconducting thin film to form a grain boundary therebetween; depositing an insulating layer on the second superconducting thin film to protect the second superconducting thin film from degrading in property in the air; selectively etching back the insulating layer to form a patterned insulating layer; forming a gate insulating layer on the patterned insulating layer; and coating metal electrodes thereon, source/drain being formed respectively on the etched portions, and a gate electrode being formed on the deposited portion of the gate insulating layer directly above the grain boundary. In the superconducting FET manufactured thus, since a gate electrode is formed directly above a grain boundary, current flowing between source and drain can be controlled by a voltage applied through an gate insulating layer. Also, since the grain boundary serving as a channel can be formed in a cheaper oxide crystal substrate by variation in a growing temperature of thin film without using an expensive by-crystal substrate, a high-temperature superconducting FET can be economically fabricated.

    Superconducting field effect device
    6.
    发明专利
    Superconducting field effect device 未知

    公开(公告)号：DE4443800A1

    公开(公告)日：1996-05-30

    申请号：DE4443800

    申请日：1994-12-08

    Applicant: KOREA ELECTRONICS TELECOMM

    Inventor： SUH JEONG-DAE ,  SUNG GUN-YONG

    IPC: H01L39/00 ,  H01L29/78 ,  H01L39/22 ,  H01L39/24 ,  H01L39/14 ,  H01L39/12 ,  C04B35/505

    Abstract: Superconducting field effect device comprises: (a) an oxide crystal substrate (10); (b) 1st high temp. superconducting thin films (20), electrically sepd. from each other, where each film acts as a source/drain; (c) a patterning layer (30) formed on one of the films (20) and one part of the exposed surface of the substrate; (d) a 2nd high temp. superconducting thin film (40) having a 1st part (40 a) orientated vertically in the C axis, in which the patterning layer does not exist, a 2nd part (40 b) orientated horizontally in the C-axis, in which the patterning layer does exist, and a grain boundary (40c) formed between the two parts; (e) a gate insulating layer (60) formed on the 2nd thin film; (f) a gate electrode (70 c) formed on the gate insulating layer and; (g) source and drain electrodes (70 a, 70 b) formed on the exposed surfaces of the 2nd high temp. superconducting thin film over both 1st thin films. Prodn. of the device is also claimed.

    9.
    发明专利
    未知

    公开(公告)号：NL9402097A

    公开(公告)日：1996-07-01

    申请号：NL9402097

    申请日：1994-12-09

    Applicant: KOREA ELECTRONICS TELECOMM

    Inventor： SUH JEONG-DAE ,  SUNG GUN-YONG

    IPC: H01L39/00 ,  H01L29/78 ,  H01L39/22 ,  H01L39/24 ,  H01L39/14

    Abstract: Disclosed is a method for making a superconducting field-effect device with a grain boundary channel, the method comprising the steps of depositing a first superconducting thin film on a substrate; patterning the first superconducting thin film to form a patterned superconducting thin film having an opening; depositing a template layer thereon; selectively etching back the template layer to form a patterned template layer; growing a second superconducting thin film to form a grain boundary therebetween; depositing an insulating layer on the second superconducting thin film to protect the second superconducting thin film from degrading in property in the air; selectively etching back the insulating layer to form a patterned insulating layer; forming a gate insulating layer on the patterned insulating layer; and coating metal electrodes thereon, source/drain being formed respectively on the etched portions, and a gate electrode being formed on the deposited portion of the gate insulating layer directly above the grain boundary. In the superconducting FET manufactured thus, since a gate electrode is formed directly above a grain boundary, current flowing between source and drain can be controlled by a voltage applied through an gate insulating layer. Also, since the grain boundary serving as a channel can be formed in a cheaper oxide crystal substrate by variation in a growing temperature of thin film without using an expensive by-crystal substrate, a high-temperature superconducting FET can be economically fabricated.

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