公开(公告)号：JPH10145428A

公开(公告)日：1998-05-29

申请号：JP22531397

申请日：1997-08-21

Applicant: KOREA ELECTRONICS TELECOMM ,  KOREA TELECOMMUN

Inventor： IN-TEKU HAN ,  KIISOKU CHE ,  KUON-CHORU PARK

IPC: H04Q11/06 ,  H04L12/70 ,  H04Q11/04 ,  H04L12/56

Abstract: PROBLEM TO BE SOLVED: To prevent the stop of following D-channel packet exchange service by providing a packet processor in relaxed duplex structure based on a partial load charging system. SOLUTION: As for communication between 1st frame multiplexing/ demultiplexing processors (FMDC) 2200 -2203 and 1st frame multiplexing/ demultiplexing processor (FMDP) 230 and between 2nd FMDC 2500 -2503 and 2nd FMDP 240, by exchanging frame transmission/reception information through a mailbox constructed in a common memory, the half of traffic for respective D-channel packet exchanges is processed. When one link access procedure-for- balanced mode (LAPB) link is cut off, D channel frames are continuously transmitted/received through the remaining LAPB link without disconnecting any packet call and when all the LAPB links are cut off on any one side, duplexing is switched to the opposite side. Then, a duplexing function is executed so as to perform processing through that LAPB link.