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公开(公告)号:JPH07202952A
公开(公告)日:1995-08-04
申请号:JP29152794
申请日:1994-11-25
Applicant: KOREA ELECTRONICS TELECOMM , KOREA TELECOMMUNICATION
Inventor: JOO BUM-SOON , LEE BUM-CHOL , KIM JUNG-SIK , KANG SUK-YUL
Abstract: PURPOSE: To execute more stable re-timing. CONSTITUTION: A local clock pulse FT generated by a local clock pulse generator 11 has a frequency which is six times that of the bit rate of inputted binary data D. A clock pulse parallel generator 12 successively delays an external input clock pulse CP at one period of local clock pulse FT. A data re-timing unit 16 re-times re-timing clock pulses in the center of data eye pattern, when seven delayed clock pulses CP1, CP2, CP3, CP4, CP5, CP6 and CP7 are generated and the delayed time of re-timing clock pulses in the selection process of re- timing clock pulse selector 15 is the same as the delay time of data DD compensated by a time delay compensator 16.