公开(公告)号：JPH0340072A

公开(公告)日：1991-02-20

申请号：JP32977389

申请日：1989-12-21

Applicant: KOREA ELECTRONICS TELECOMM ,  KOREA TELECOMMUNICATION

Inventor： JIN HOO HAN ,  SAN JIYUN KIMU

IPC: G06F12/00 ,  G06F12/04 ,  G06F13/00 ,  G06T1/60 ,  G09G5/393 ,  G11C8/00

Abstract: PURPOSE: To shorten the BITBLT(bit boundary block transfer) processing time and to improve the performance of a window function, a graphic function, or the like by providing an address control means in the front end of a memory device and adding values of the address input and the address control input to obtain an address signal of the memory device. CONSTITUTION: A memory device 9 is provided with an address control means 10 provided with an address control input AC port, an address input port, and an address computing element 8 in the front end. Values of the address input and the address control input AC applied to the address control means 10 are added, and this addition result is inputted as the address signal of the memory device 9. Thus, the BITBLT processing time is shortened, and the entire image processing effect is improved, and the window function, the graphic function, or the like of a work station is improved furthermore.