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公开(公告)号：ES2040659A2
公开(公告)日：1993-10-16
申请号：ES9201484
申请日：1992-07-16
Applicant: KOREA TELECOMMUNICATION
Inventor： IL SONG HAN
Abstract: MULTIPLICADOR DE CONTROL CON MOSFETS. ESTA DESTINADO A LA OBTENCION DE LA FUNCION PRECISA DE LA MULTIPLICACION OPERACIONAL POR DESPLAZAMIENTO DE LA TENSION DE DESPLAZAMIENTO DE LOS MOSFETS PARA ELIMINAR SU INTENSIDAD NO LINEAL. UTILIZA FUENTES DE TENSION SIMETRICA, UN CIRCUITO ESPECULAR DE INTENSIDAD Y MEDIOS LINEALES DE MOSFET PARA HACER VARIAR LINEALMENTE LA INTENSIDAD DE SALIDA HACIA UN NODO, DE ACUERDO CON UNA TENSION DE ENTRADA PROCEDENTE DE UNA FUENTE VG Y UNA TENSION SIMETRICA DE ENTRADA PROCEDENTE DE FUENTES VX Y -VX. LA TENSION DE ENTRADA DE LA FUENTE VG ESTA ASOCIADA OPERATIVAMENTE CON LA TENSION SIMETRICA DE ENTRADA PROCEDENTE DE LAS FUENTES VX Y -VX. UN ELEMENTO DE IMPEDANCIA PRODUCE UNA TENSION VO, ESTANDO CONECTADO EL ELEMENTO DE IMPEDANCIA AL NODO DE LOS MEDIOS LINEALES DE MOSFET Y LA MASA. APLICABLE, PARTICULARMENTE, PARA OBTENER HIBRIDOS ANALOGICO-DIGITALES DE UNA SINAPSIS NEURAL ARTIFICIAL.
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公开(公告)号：GR920100399A
公开(公告)日：1993-07-30
申请号：GR92100399
申请日：1992-09-23
Applicant: KOREA TELECOMMUNICATION
Inventor： IL SONG HAN
Abstract: A MOSFET controlling multiplier for obtaining the precise function of the operational multiplication by offsetting the offset voltage of MOSFET to remove the non-linear current of MOSFET, utilizing symmetrical voltage sources and a current mirror circuit is disclosed. The MOSFET controlling multiplier utilizes a MOSFET linear means for linearly varying the output current I to a node A in accordance with an input voltage from an input voltage source Vg and a symmetrical input voltage from voltage sources Vx and -Vx. The input voltage from the input voltage source Vg is operatively associated with the symmetrical input voltage from the voltage sources Vx and -Vx. An impedance element Z outputs a voltage Vo, with the impedance element Z being connected to the node A of the MOSFET linear means and the ground.
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公开(公告)号：ES2040660B1
公开(公告)日：1996-09-01
申请号：ES9201485
申请日：1992-07-16
Applicant: KOREA TELECOMMUNICATION
Inventor： IL SONG HAN
Abstract: A MOSFET analog multiplier with a variable resistive MOSFET linear means for linearly varying output current I depending upon a symmetrical input voltage from voltage sources V2 and -V2 and an input voltage from an input voltage source V1 operatively associated with the symmetrical input voltage from the voltage source V2 and -V2, with the variable resistive MOSFET linear means having a node A to output the varied output current I therethrough is disclosed. An operational amplifying unit for amplifying the linearly varied output current I and which includes an operational amplifier U with an inverting input terminal connected to the node A of the MOSFET linear means, a non-inverting input terminal connected to ground, and an output terminal. The operational amplifying unit further includes a feedback element Z connected between the inverting input terminal and the output terminal of the operational amplifier U, where in use the output terminal outputs a voltage Vo.
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公开(公告)号：ES2040660A2
公开(公告)日：1993-10-16
申请号：ES9201485
申请日：1992-07-16
Applicant: KOREA TELECOMMUNICATION
Inventor： IL SONG HAN
Abstract: MULTIPLICADOR ANALOGICO CON MOSFETS. PRESENTA MEDIOS LINEALES DE MOSFET DE RESISTIVIDAD VARIABLE PARA HACER VARIAR LINEALMENTE LA INTENSIDAD "I" DE SALIDA EN FUNCION DE UNA TENSION SIMETRICA DE ENTRADA PROCEDENTE DE FUENTES "V2" Y "-V2" DE TENSION Y UNA TENSION DE ENTRADA PROCEDENTE DE UNA FUENTE "V1" DE TENSION DE ENTRADA ASOCIADA OPERATIVAMENTE CON LA TENSION SIMETRICA DE ENTRADA PROCEDENTE DE LAS FUENTES "V2" Y "-V2" DE TENSION, TENIENDO LOS MEDIOS LINEALES DE MOSFET DE RESISTIVIDAD VARIABLE UN NODO "A" PARA PRODUCIR A SU TRAVES LA INTENSIDAD "I" DE SALIDA VARIADA. LA UNIDAD AMPLIFICADORA OPERACIONAL INCLUYE ADEMAS UN ELEMENTO "Z" DE REALIMENTACION CONECTADO ENTRE EL TERMINAL DE ENTRADA DE INVERSION Y EL TERMINAL DE SALIDA DEL AMPLIFICADOR OPERACIONAL "U", PRODUCIENDO EL TERMINAL DE SALIDA UNA TENSION "VO". APLICABLE, PARTICULARMENTE, PARA OBTENER HIBRIDOS ANALOGICO-DIGITALES DE UNA SINAPSIS NEURAL ARTIFICIAL.
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Patent Agency Ranking
公开(公告)号：ES2040659B1
公开(公告)日：1996-11-01
申请号：ES9201484
申请日：1992-07-16
Applicant: KOREA TELECOMMUNICATION
Inventor： IL SONG HAN
Abstract: A MOSFET controlling multiplier for obtaining the precise function of the operational multiplication by offsetting the offset voltage of MOSFET to remove the non-linear current of MOSFET, utilizing symmetrical voltage sources and a current mirror circuit is disclosed. The MOSFET controlling multiplier utilizes a MOSFET linear means for linearly varying the output current I to a node A in accordance with an input voltage from an input voltage source Vg and a symmetrical input voltage from voltage sources Vx and -Vx. The input voltage from the input voltage source Vg is operatively associated with the symmetrical input voltage from the voltage sources Vx and -Vx. An impedance element Z outputs a voltage Vo, with the impedance element Z being connected to the node A of the MOSFET linear means and the ground.
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公开(公告)号：FR2683353B1
公开(公告)日：1997-03-28
申请号：FR9208504
申请日：1992-07-09
Applicant: KOREA TELECOMMUNICATION
Inventor： IL SONG HAN
Abstract: A MOSFET controlling multiplier for obtaining the precise function of the operational multiplication by offsetting the offset voltage of MOSFET to remove the non-linear current of MOSFET, utilizing symmetrical voltage sources and a current mirror circuit is disclosed. The MOSFET controlling multiplier utilizes a MOSFET linear means for linearly varying the output current I to a node A in accordance with an input voltage from an input voltage source Vg and a symmetrical input voltage from voltage sources Vx and -Vx. The input voltage from the input voltage source Vg is operatively associated with the symmetrical input voltage from the voltage sources Vx and -Vx. An impedance element Z outputs a voltage Vo, with the impedance element Z being connected to the node A of the MOSFET linear means and the ground.
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公开(公告)号：GR1002179B
公开(公告)日：1996-03-11
申请号：GR92100398
申请日：1992-09-23
Applicant: KOREA TELECOMMUNICATION
Inventor： IL SONG HAN
Abstract: A MOSFET analog multiplier with a variable resistive MOSFET linear means for linearly varying output current I depending upon a symmetrical input voltage from voltage sources V2 and -V2 and an input voltage from an input voltage source V1 operatively associated with the symmetrical input voltage from the voltage source V2 and -V2, with the variable resistive MOSFET linear means having a node A to output the varied output current I therethrough is disclosed. An operational amplifying unit for amplifying the linearly varied output current I and which includes an operational amplifier U with an inverting input terminal connected to the node A of the MOSFET linear means, a non-inverting input terminal connected to ground, and an output terminal. The operational amplifying unit further includes a feedback element Z connected between the inverting input terminal and the output terminal of the operational amplifier U, where in use the output terminal outputs a voltage Vo.
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公开(公告)号：GR1002150B
公开(公告)日：1996-02-20
申请号：GR92100399
申请日：1992-09-23
Applicant: KOREA TELECOMMUNICATION
Inventor： IL SONG HAN
Abstract: A MOSFET controlling multiplier for obtaining the precise function of the operational multiplication by offsetting the offset voltage of MOSFET to remove the non-linear current of MOSFET, utilizing symmetrical voltage sources and a current mirror circuit is disclosed. The MOSFET controlling multiplier utilizes a MOSFET linear means for linearly varying the output current I to a node A in accordance with an input voltage from an input voltage source Vg and a symmetrical input voltage from voltage sources Vx and -Vx. The input voltage from the input voltage source Vg is operatively associated with the symmetrical input voltage from the voltage sources Vx and -Vx. An impedance element Z outputs a voltage Vo, with the impedance element Z being connected to the node A of the MOSFET linear means and the ground.
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公开(公告)号：GR920100398A
公开(公告)日：1993-07-30
申请号：GR92100398
申请日：1992-09-23
Applicant: KOREA TELECOMMUNICATION
Inventor： IL SONG HAN
Abstract: A MOSFET analog multiplier with a variable resistive MOSFET linear means for linearly varying output current I depending upon a symmetrical input voltage from voltage sources V2 and -V2 and an input voltage from an input voltage source V1 operatively associated with the symmetrical input voltage from the voltage source V2 and -V2, with the variable resistive MOSFET linear means having a node A to output the varied output current I therethrough is disclosed. An operational amplifying unit for amplifying the linearly varied output current I and which includes an operational amplifier U with an inverting input terminal connected to the node A of the MOSFET linear means, a non-inverting input terminal connected to ground, and an output terminal. The operational amplifying unit further includes a feedback element Z connected between the inverting input terminal and the output terminal of the operational amplifier U, where in use the output terminal outputs a voltage Vo.
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