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    LIQUID CRYSTAL DISPLAY DEVICE AND FABRICATING METHOD OF THE SAME
    1.
    发明公开
    LIQUID CRYSTAL DISPLAY DEVICE AND FABRICATING METHOD OF THE SAME 审中-公开
    液晶显示装置及其制作方法

    公开(公告)号：KR20070108970A

    公开(公告)日：2007-11-15

    申请号：KR20060041311

    申请日：2006-05-09

    Applicant: LG PHILIPS LCD CO LTD

    Inventor： CHO KI SUL ,  CHOI YOUNG SEOK ,  AHN BYUNG YONG ,  HWANG TAE UNG ,  MIN DONG JUN ,  JUNG BO KYOUNG ,  SHIN JI HOON

    IPC: G02F1/136

    CPC classification number: G02F1/1335 ,  G02F1/1345 ,  G02F1/136 ,  H01L29/786

    Abstract: A liquid crystal display device and a fabricating method thereof are provided to prevent a pixel opening failure due to a contact hole formed in a protective film by directly connecting a thin film transistor and a pixel electrode. A liquid crystal display device comprises a substrate(100), a gate line(101) and a data line(102), a thin film transistor, a pixel electrode(103), and a spacer(106). The gate line and a data line are formed on the substrate and are crossed each other. The thin film transistor is formed on a cross area of the gate line and the data line. The pixel electrode is connected to the thin film transistor electrically. A part of the spacer is formed on a surface of a semiconductor layer(109) of the thin film transistor. The spacer is formed for covering a channel region(109b) of the semiconductor layer. The spacer is formed with one among an organic film, an inorganic film, or a laminated film of them.

    Abstract translation: 提供了一种液晶显示装置及其制造方法，以通过直接连接薄膜晶体管和像素电极来防止由保护膜中形成的接触孔引起的像素开路故障。 液晶显示装置包括基板（100），栅极线（101）和数据线（102），薄膜晶体管，像素电极（103）和间隔物（106）。 栅极线和数据线形成在基板上并彼此交叉。 薄膜晶体管形成在栅极线和数据线的交叉区域上。 像素电极电连接到薄膜晶体管。 间隔物的一部分形成在薄膜晶体管的半导体层（109）的表面上。 形成间隔物以覆盖半导体层的沟道区（109b）。 间隔物由有机膜，无机膜或它们的层叠膜中的一个形成。

    Array substrate for liquid crystal display device and fabrication method thereof
    2.
    发明专利
    Array substrate for liquid crystal display device and fabrication method thereof 有权
    用于液晶显示装置的阵列基板及其制造方法

    公开(公告)号：JP2006047985A

    公开(公告)日：2006-02-16

    申请号：JP2005154615

    申请日：2005-05-26

    Applicant: Lg Philips Lcd Co Ltd ,  エルジー フィリップス エルシーディー カンパニー リミテッド

    Inventor： CHOI YOUNG SEOK ,  AHN BYUNG YONG ,  YU HONG WOO ,  CHO KI SUL

    IPC: G09F9/00 ,  G02F1/13 ,  G02F1/1362 ,  G02F1/1368 ,  G09F9/30

    CPC classification number: G02F1/13458 ,  G02F1/1362 ,  G02F1/136213 ,  G02F2001/13629

    Abstract: PROBLEM TO BE SOLVED: To prevent an electrode open defect by reducing fabrication unit costs by simplifying fabrication processes of an array substrate. SOLUTION: Disclosed is an array substrate of an liquid crystal display device including a substrate 210 where a plurality of pixel regions are defined, a plurality of gate lines constituted in one direction at specified parts of the pixel regions, data lines which cross the gate lines via an insulating film, thin film transistors which are disposed at intersections of the gate lines and data lines and each include a gate electrode extended from a gate line, an active layer, a source electrode and a drain electrode, a channel insulating film 242 which is formed on the active layer of a thin film transistor between the source electrode and drain electrode, a pixel electrode 281 which is formed in the pixel region in contact with the drain electrode, a gate pad 277 which is extended from the gate line and formed at one end and comes into contact with a transparent electrode pattern via the gate insulating film, and a data pad 278 which is extended from the data line and formed at one end, and formed on an active layer pattern. COPYRIGHT: (C)2006,JPO&NCIPI

    Abstract translation: 要解决的问题：通过简化阵列基板的制造工艺，通过降低制造单位成本来防止电极打开缺陷。 解决方案：公开了一种液晶显示装置的阵列基板，其包括：限定多个像素区域的基板210，在像素区域的特定部分沿一个方向构成的多个栅极线， 通过绝缘膜的栅极线，设置在栅极线和数据线的交点处的薄膜晶体管，每个包括从栅极线延伸的栅电极，有源层，源电极和漏电极，沟道绝缘 形成在源电极和漏电极之间的薄膜晶体管的有源层上的膜242，形成在与漏电极接触的像素区域中的像素电极281，从栅极延伸的栅极焊盘277 并且在一端形成并经由栅极绝缘膜与透明电极图案接触，并且数据焊盘278从数据线延伸并形成在一个e 并且在有源层图案上形成。 版权所有（C）2006，JPO＆NCIPI

    ARRAY SUBSTRATE FOR LIQUID CRYSTAL DISPLAY DEVICE AND FABRICATING METHOD OF SAME
    3.
    发明专利
    ARRAY SUBSTRATE FOR LIQUID CRYSTAL DISPLAY DEVICE AND FABRICATING METHOD OF SAME 审中-公开

    公开(公告)号：JP2006323344A

    公开(公告)日：2006-11-30

    申请号：JP2005363227

    申请日：2005-12-16

    Applicant: LG PHILIPS LCD CO LTD

    Inventor： CHO KI SUL ,  CHOI YOUNG-SEOK ,  AHN BYUNG-YONG ,  HWANG TAE-UNG ,  MIN DONG-JUN ,  JUNG BO-KYOUNG

    IPC: G02F1/1368 ,  G02F1/1345

    Abstract: PROBLEM TO BE SOLVED: To provide an array substrate for liquid crystal display device and a fabricating method of the same, capable of improving the process yield by reducing a manufacturing cost and time through further simplification of mask processes. SOLUTION: The array substrate for liquid crystal display device is manufactured by using a mask having half transmitting portions of slit widths different from each other upon the second process. Thereby, on the ashing process of a photosensitive layer, etching ratio on a part where wiring is positioned is equalized to the etching ratio on a part where the wiring is not positioned and, therefore, the advantage of preventing a defect from occurring on the surface of the wiring can be obtained. This invention is also characterized in that the array substrate is manufactured through three mask processes. COPYRIGHT: (C)2007,JPO&INPIT

    Thin film transistor array substrate and its manufacturing method
    4.
    发明专利
    Thin film transistor array substrate and its manufacturing method 审中-公开
    薄膜晶体管阵列及其制造方法

    公开(公告)号：JP2006191016A

    公开(公告)日：2006-07-20

    申请号：JP2005356389

    申请日：2005-12-09

    Applicant: Lg Philips Lcd Co Ltd ,  エルジー フィリップス エルシーディー カンパニー リミテッド

    Inventor： CHOI YOUNG SEOK ,  YU HONG WOO ,  CHO KI SUL ,  LEE JAE OW ,  JUNG BO KYONG

    IPC: H01L29/786 ,  G02F1/1343 ,  G02F1/1345 ,  G02F1/1368 ,  H01L21/3205 ,  H01L23/52

    CPC classification number: H01L27/12 ,  H01L27/1248 ,  H01L27/1288 ,  H01L29/458

    Abstract: PROBLEM TO BE SOLVED: To obtain a thin film transistor array substrate which protects a thin film transistor without a protective film and decreases its manufacturing cost. SOLUTION: The thin film transistor array substrate comprises a gate electrode 106 connected to a gate line 102, a source electrode 108 connected to a data line 104, a drain electrode 110 facing the source electrode through a channel, semiconductor layers 114, 116 which form the channel between the source electrode and the drain electrode, a pixel electrode 122 formed in contact with the drain electrode, a channel protective film 120 formed on the channel of the semiconductor layer, a gate pad 150 extended from the gate line and with a semiconductor pattern and a transparent conductive pattern laminated, a data pad 160 connected to the data line and with the transparent conductive pattern laminated, and a gate insulating film 112 formed under the semiconductor layer, the gate line and the gate pad, and the data line and the data pad. COPYRIGHT: (C)2006,JPO&NCIPI

    Abstract translation: 要解决的问题：获得保护没有保护膜的薄膜晶体管并降低其制造成本的薄膜晶体管阵列基板。 解决方案：薄膜晶体管阵列基板包括连接到栅极线102的栅电极106，连接到数据线104的源电极108，通过沟道面对源电极的漏电极110，半导体层114， 116，其形成在源电极和漏电极之间的通道，形成为与漏极接触的像素电极122，形成在半导体层的沟道上的沟道保护膜120，从栅极线延伸的栅极焊盘150和 层叠了半导体图案和透明导电图案，连接到数据线并且与透明导电图案层叠的数据焊盘160以及形成在半导体层下方的栅极绝缘膜112，栅极线和栅极焊盘，以及 数据线和数据垫。 版权所有（C）2006，JPO＆NCIPI

    Array substrate for LCD and fabrication method thereof
    6.
    发明专利
    Array substrate for LCD and fabrication method thereof 未知

    公开(公告)号：GB2416908A

    公开(公告)日：2006-02-08

    申请号：GB0513166

    申请日：2005-06-28

    Applicant: LG PHILIPS LCD CO LTD

    Inventor： YU HONG WOO ,  AHN BYUNG YONG ,  CHO KI SUL ,  CHOI YOUNG SEOK

    IPC: G02F1/1362 ,  G02F1/1343

    Abstract: Disclosed is an array substrate of an LCD, and a method for fabricating it, which simplifies the fabrication process, thereby reducing fabrication costs. The process is simplified because the array substrate (210) does not have a passivation film. The thin film transistors on the array substrate (210) each have an active layer (241) that is protected from contamination by forming a channel insulation layer (242) on the active layer (241) through a dry-etching process. Further, the gate line (221), gate pad (271), and gate electrode (222) may have a two-layer structure having a low-resistance metal layer and a barrier metal layer, or a three-layer structure having a low-resistance metal layer and two barrier metal layers. In addition the direct contact between the drain electrode (263) and the pixel electrode (281) avoids failure.

    8.
    发明专利
    未知

    公开(公告)号：FR2872344B1

    公开(公告)日：2008-08-15

    申请号：FR0506050

    申请日：2005-06-15

    Applicant: LG PHILIPS LCD CO LTD

    Inventor： CHOI YOUNG SEOK ,  AHN BYUNG YONG ,  YU HONG WOO ,  CHO KI SUL

    IPC: G02F1/136 ,  H01L27/146 ,  G02F1/1362 ,  G02F1/1368 ,  H01L21/00 ,  H01L21/336 ,  H01L21/77 ,  H01L21/84 ,  H01L27/01 ,  H01L27/12 ,  H01L29/417 ,  H01L29/786

    Abstract: A thin film transistor array substrate comprises gate electrode connected to gate line; source electrode connected to data line crossing the gate line to define pixel area; drain electrode opposed to the source electrode with a channel between them; semiconductor layer in the channel; pixel electrode overlapping and contacting the drain electrode; and channel protective film provided on the channel to protect the semiconductor layer. A thin film transistor (130) array substrate comprises: (A) gate electrode (106) connected to gate line (102); (B) source electrode (108) connected to data line (104) crossing the gate line to define pixel area; (C) drain electrode (110) opposed to the source electrode with a channel between them; (D) semiconductor layer (114) in the channel; (E) pixel electrode (112) positioned at the pixel area, substantially all of the pixel electrode overlapping the drain electrode contacting the drain electrode; and (F) channel protective film (120) provided on the semiconductor layer corresponding to the channel to protect the semiconductor layer in the channel. An independent claim is also included for fabricating a thin film transistor array substrate, comprising: (A) forming gate electrode on a substrate; (B) forming gate insulating film on the gate electrode; (C) forming source and drain electrodes and semiconductor layer in a channel between the source and drain electrodes, and forming a channel protective film on the semiconductor layer to protect the semiconductor layer in the channel; (D) forming the drain electrode on the gate insulating film; and (E) forming a pixel electrode such that all of the pixel electrode overlapping the drain electrode contacts the drain electrode.

    Array substrate for lcd and fabrication method thereof
    9.
    发明专利
    Array substrate for lcd and fabrication method thereof 未知

    公开(公告)号：GB2416908B

    公开(公告)日：2007-04-11

    申请号：GB0513166

    申请日：2005-06-28

    Applicant: LG PHILIPS LCD CO LTD

    Inventor： YU HONG WOO ,  AHN BYUNG YONG ,  CHO KI SUL ,  CHOI YOUNG SEOK

    IPC: G02F1/1362 ,  G02F1/1343

    Abstract: Disclosed is an array substrate of an LCD, and a method for fabricating it, which simplifies the fabrication process, thereby reducing fabrication costs. The process is simplified because the array substrate does not have a passivation film. The thin film transistors on the array substrate each have an active layer that is protected from contamination by forming a channel insulation layer on the active layer through a dry-etching process. Further, the gate line, gate pad, and gate electrode may have a two-layer structure having a low-resistance metal layer and a barrier metal layer, or a three-layer structure having a low-resistance metal layer and two barrier metal layers.

    10.
    发明专利
    未知

    公开(公告)号：FR2873826B1

    公开(公告)日：2007-09-14

    申请号：FR0506453

    申请日：2005-06-24

    Applicant: LG PHILIPS LCD CO LTD

    Inventor： CHOI YOUNG SEOK ,  AHN BYUNG YONG ,  YU HONG WOO ,  CHO KI SUL

    IPC: G02F1/1368 ,  G02F1/1362

    Abstract: Disclosed is an array substrate of an LCD, and a method for fabricating it, which simplifies the fabrication process, thereby reducing fabrication costs. The process is simplified because the array substrate does not have a passivation film. The thin film transistors on the array substrate each have an active layer that is protected from contamination by forming a channel insulation layer on the active layer through a dry-etching process. Further, the gate line, gate pad, and gate electrode may have a two-layer structure having a low-resistance metal layer and a barrier metal layer, or a three-layer structure having a low-resistance metal layer and two barrier metal layers.

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