公开(公告)号：JP2001325212A

公开(公告)日：2001-11-22

申请号：JP2001092257

申请日：2001-03-28

Applicant: LUCENT TECHNOLOGIES INC

Inventor： BODNAR BOHDAN LEW ,  ROMY NEIL JEROME

IPC: G06F15/163 ,  G06F13/28 ,  G06F13/36 ,  G06F13/38 ,  G06F13/42 ,  G06F15/177

Abstract: PROBLEM TO BE SOLVED: To provide a method and a device for transmitting data blocks between the source processor and destination processor of a multiprocessor system. SOLUTION: An intelligent bus interconnection unit(IBIU) functions as an automatic device, receives an instruction from the source processor by using a control block supplied by the source processor and supplies the instruction to the destination processor. The IBIU receives the information of the data block described by the contents of the relating control block and then sends the data block to the destination processor together with the control block relating to it. The data block is transmitted by using one of the plural levels of priority. The process of transmitting the data block is decomposed into the processes of transmitting a series of sub blocks.

公开(公告)号：JP2001358773A

公开(公告)日：2001-12-26

申请号：JP2001133766

申请日：2001-05-01

Applicant: LUCENT TECHNOLOGIES INC

Inventor： BODNAR BOHDAN LEW

IPC: H04L12/56

Abstract: PROBLEM TO BE SOLVED: To provide packet exchange overload control with respect to a packet exchange area in general and specifically, the case the real time measurement of buffer share is impossible. SOLUTION: A distribution curve is expanded about the processing speed of a received packet flow and the probability of overload according to this method. Transmission packet flow is measured and the processing speed of the received packet flow is measured. An overload probability is operated according to the existence/absence of a burst in the transmission packet flow and the position of the measured processing speed on the distribution curve. When the overload probability is higher than the threshold, a packet is left out of transmission flow.

公开(公告)号：JP2002057716A

公开(公告)日：2002-02-22

申请号：JP2001210299

申请日：2001-07-11

Applicant: LUCENT TECHNOLOGIES INC

Inventor： BODNAR BOHDAN LEW ,  BYERS CHARLES CALVIN ,  DUNN JAMES PATRICK

IPC: H04L12/46 ,  H04L12/56

Abstract: PROBLEM TO BE SOLVED: To provide an improved Internet protocol packet router that can process many packets arrived to each module of the router in the unit of seconds by using an economical means. SOLUTION: This invention provides the router and method that routes packets having a destination address at their header and uses a simple routing module, which can route only packets whose destination addresses are stored in a limited memory storing corresponding output port addresses of the module, a default routing module, which is used to find out the identification of output ports used to route packets other than the packets received by the simple routing module of the router, and a network fabric which is interconnected to at least either of both the modules and sets up the connection between the modules.

公开(公告)号：JP2000049868A

公开(公告)日：2000-02-18

申请号：JP15752599

申请日：1999-06-04

Applicant: LUCENT TECHNOLOGIES INC

Inventor： BODNAR BOHDAN LEW ,  DUNN JAMES PATRICK ,  HERSE CONRAD MARTIN ,  TAMMARU ENN

IPC: H04L12/66 ,  H04Q11/04 ,  H04L12/56

Abstract: PROBLEM TO BE SOLVED: To enable access to all the time slots of a TSI by storing a packet in a packet assembler-inverse assembler, transmitting it and directly connecting a processor for inserting the output packet to an output buffer to the memory of the TSI. SOLUTION: A trunk time slot stores a PCM signal 203 and sends the packet to a RAM 211 for assembling/inversely assembling it. A line time slot is sent to a modem signal processor 201, analog PCM data are transformed to digital data to be used for the RAM 20, and the digital data in the RAM 211 are transformed to analog PCM data for transmission to the line time slot. The packet assembled or inversely assembled by the RAM 211 is changed so as to have a data address by a routing processor 213 and stored in a TSI start interface 105. Thus, the ATM network is directly interfaced while using the ATM interface 221.

公开(公告)号：DE69901138D1

公开(公告)日：2002-05-08

申请号：DE69901138

申请日：1999-07-20

Applicant: LUCENT TECHNOLOGIES INC

Inventor： BODNAR BOHDAN LEW ,  DUNN JAMES PATRICK ,  HERSE CONRAD MARTIN ,  TAMMARU ENN

IPC: H04L12/46 ,  H04L12/56

Abstract: A large router for routing datagrams. The large router comprises a plurality of router slices, each of which receives switches and transmits datagrams. Each router slice has a routing memory for routing the packets. If a packet is received whose destination address is not known to the receiving packet slice, the packet slice broadcasts a request for routing information for that datagram to the other packet slices of the large router and routes the packet in accordance with the received responses. Groups of slices are interconnected by a time slot interchange (TSI) unit, and groups of TSIs are interconnected by a time multiplexed switch. The router can consist of more than one switch; the switches being interconnected by high speed data links. Advantageously, the router, though composed of small slices, acts as if it were a single large high capacity entity.

公开(公告)号：DE69902321T2

公开(公告)日：2003-01-30

申请号：DE69902321

申请日：1999-05-26

Applicant: LUCENT TECHNOLOGIES INC

Inventor： BODNAR BOHDAN LEW ,  HERSE CONRAD MARTIN ,  DUNN JAMES PATRICK ,  TAMMARU ENN

IPC: H04L12/66 ,  H04Q11/04

Abstract: Apparatus and a method for interfacing between the Internet and the Telephone Network. A time slot interchange (TSI) is enhanced by the addition of a supplementary memory (211) for storing data for accumulating Internet packets. When a packet has been accumulated, the appropriate header is inserted into the packet under the control of a routing processor (213), and the packet can then be sent as a group of adjacent PCM samples over a connection to the Internet. In other embodiments, information is sent to the Internet over a direct data pipe for transmitting ATM cells or Ethernet packets. A Vocoder signal processor (301) can be inserted between the TSI memory (103), and the supplementary memory to convert PCM voice samples into vocoded voice samples for transmission over the Internet. A modem signal processor (201) can be interposed between the TSI memory and the supplementary memory to convert between analog data (representing for example, shift key analog signals) and binary data for transmission within packets over the Internet. Advantageously, existing TSI units can be used to interface with both the telephone plant and the Internet.

公开(公告)号：DE60100927T2

公开(公告)日：2004-08-12

申请号：DE60100927

申请日：2001-05-22

Applicant: LUCENT TECHNOLOGIES INC

Inventor： BODNAR BOHDAN LEW ,  BYERS CHARLES CALVIN ,  DUNN JAMES PATRICK

IPC: H04L12/46 ,  H04L12/56 ,  H04L12/26

Abstract: Apparatus and a method for routing packets having destination addresses in their header. The routing modules of the router are of two types: simple routing modules which can only route packets whose destination address is stored in a limited memory of the module for storing corresponding output port addresses, and default modules which are used to find the identity of an output port for routing all other packets received by the simple routing modules of the router. Advantageously, the processing load of the simple routing modules is smoothed because these modules do not have to perform the complex searching functions required to find destination addresses not readily accessible in their memory. Advantageously, the single or small number of default routing modules can have sophisticated memory and processor facilities for searching over a very large number of destination addresses and for concentrating the process of sending queries to other routers for additional information.

公开(公告)号：CA2347998C

公开(公告)日：2005-12-06

申请号：CA2347998

申请日：2001-05-22

Applicant: LUCENT TECHNOLOGIES INC

Inventor： BYERS CHARLES CALVIN ,  BODNAR BOHDAN LEW ,  DUNN JAMES PATRICK

IPC: H04L12/46 ,  H04L12/56

Abstract: Apparatus and a method for routing packets having destination addresses in their header. The routing modules of the router are of two types: simple routing modules which can only route packets whose destination address is stored in a limited memory of the module for storing corresponding output port addresses, and default modules which are used to find the identity of an output port for routing all other packets received b y the simple routing modules of the router. Advantageously, the processing load of the simple routing modules is smoothed because these modules do not have to perform the complex searching functions required to find destination addresses not readily accessible in their memory. Advantageously, the single or small number of default routing modules can have sophisticated memory and processor facilities for searching over a very large number of destinati on addresses and for concentrating the process of sending queries to other routers for additional information.

公开(公告)号：DE69902321D1

公开(公告)日：2002-09-05

申请号：DE69902321

申请日：1999-05-26

Applicant: LUCENT TECHNOLOGIES INC

Inventor： BODNAR BOHDAN LEW ,  HERSE CONRAD MARTIN ,  DUNN JAMES PATRICK ,  TAMMARU ENN

IPC: H04L12/66 ,  H04Q11/04

Abstract: Apparatus and a method for interfacing between the Internet and the Telephone Network. A time slot interchange (TSI) is enhanced by the addition of a supplementary memory (211) for storing data for accumulating Internet packets. When a packet has been accumulated, the appropriate header is inserted into the packet under the control of a routing processor (213), and the packet can then be sent as a group of adjacent PCM samples over a connection to the Internet. In other embodiments, information is sent to the Internet over a direct data pipe for transmitting ATM cells or Ethernet packets. A Vocoder signal processor (301) can be inserted between the TSI memory (103), and the supplementary memory to convert PCM voice samples into vocoded voice samples for transmission over the Internet. A modem signal processor (201) can be interposed between the TSI memory and the supplementary memory to convert between analog data (representing for example, shift key analog signals) and binary data for transmission within packets over the Internet. Advantageously, existing TSI units can be used to interface with both the telephone plant and the Internet.

公开(公告)号：CA2347998A1

公开(公告)日：2002-01-11

申请号：CA2347998

申请日：2001-05-22

Applicant: LUCENT TECHNOLOGIES INC

Inventor： DUNN JAMES PATRICK ,  BODNAR BOHDAN LEW ,  BYERS CHARLES CALVIN

IPC: H04L12/46 ,  H04L12/56

Abstract: Apparatus and a method for routing packets having destination addresses in their header. The routing modules of the router are of two types: simple routing modules which can only route packets whose destination address is stored in a limited memory of the module for storing corresponding output port addresses, and default modules which are used to find the identity of an output port for routing all other packets received b y the simple routing modules of the router. Advantageously, the processing load of the simple routing modules is smoothed because these modules do not have to perform the complex searching functions required to find destination addresses not readily accessible in their memory. Advantageously, the single or small number of default routing modules can have sophisticated memory and processor facilities for searching over a very large number of destinati on addresses and for concentrating the process of sending queries to other routers for additional information.