公开(公告)号：JP2000150670A

公开(公告)日：2000-05-30

申请号：JP31815199

申请日：1999-11-09

Applicant: LUCENT TECHNOLOGIES INC

Inventor： CLEMENS JAMES T ,  DIODATO PHILIP W ,  WONG YIU-HUEN

IPC: H01L27/11 ,  G11C11/412 ,  G11C11/413 ,  H01L21/8244

Abstract: PROBLEM TO BE SOLVED: To reduce complexity of circuit in the material aspect and to obtain a memory cell having high access speed by feeding a current to a transistor through a capacitor. SOLUTION: A 4T/2C SRAM 60 includes a parasitic resistance reflected as a leas current from R1 71 and R2 72. The 4T/2C SRAM 60 also includes a flip-flop formed through cross coupling of two inverters and two access transistors T1 68 and T2 64. A memory cell is an intended conduction path for obtaining currents passing through the parasitic resistances R1 71 and R2 72 utilizing capacitors C1 61 and C2 62. These parasitic resistances R1 71 and R2 72 are reflected as leak currents passing through the dielectric of the capacitors C1 61 and C2 62, respectively, and compensate for some other leak current from four transistors T1 63, T2 64, T3 65 and T4 66.

公开(公告)号：DE69929409T2

公开(公告)日：2006-09-21

申请号：DE69929409

申请日：1999-11-02

Applicant: LUCENT TECHNOLOGIES INC

Inventor： CLEMENS JAMES T ,  DIODATO PHILIP W ,  WONG YIU-HUEN

IPC: G11C11/412 ,  H01L27/11 ,  G11C11/413 ,  H01L21/8244

Abstract: An apparatus and method for constructing a capacitor loaded memory cell. This capacitor loaded memory cell operates as a static random access memory (SRAM) cell if a particular capacitor and transistor configuration is used. Normally, capacitors are not an obvious choice as a load device for a memory cell because the intrinsic nature of capacitors is one that blocks the flow of direct current, the invention takes into account the secondary effects such as leakage of a particular dielectric used in the construction of the capacitor to modify the current blocking nature of the capacitor.

公开(公告)号：DE69929409D1

公开(公告)日：2006-04-06

申请号：DE69929409

申请日：1999-11-02

Applicant: LUCENT TECHNOLOGIES INC

Inventor： CLEMENS JAMES T ,  DIODATO PHILIP W ,  WONG YIU-HUEN

IPC: G11C11/412 ,  H01L27/11 ,  G11C11/413 ,  H01L21/8244

Abstract: An apparatus and method for constructing a capacitor loaded memory cell. This capacitor loaded memory cell operates as a static random access memory (SRAM) cell if a particular capacitor and transistor configuration is used. Normally, capacitors are not an obvious choice as a load device for a memory cell because the intrinsic nature of capacitors is one that blocks the flow of direct current, the invention takes into account the secondary effects such as leakage of a particular dielectric used in the construction of the capacitor to modify the current blocking nature of the capacitor.