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公开(公告)号:JP2001069122A
公开(公告)日:2001-03-16
申请号:JP2000196333
申请日:2000-06-29
Applicant: LUCENT TECHNOLOGIES INC
Inventor: BUEHRER R MICHAEL , HAHM MARK D , LIU SHANG-CHIEH , NICOLOSO STEVEN P
Abstract: PROBLEM TO BE SOLVED: To use an ordinary signal processor without requiring a very fast and expensive processor by making control information include acquired data on at least one of user signals to be processed. SOLUTION: A controller 204 supplies acquired user signals and control signal for discriminating timing information on them to a parallel cancellation chip(PCC) 200. Prior to reception of this information for a specific user signal, the PCC 200 sends signals received by 1st, 2nd, and 3rd antenna, pairs α, β, and γ to 1st to (k)th signal processing chips(SPC) 202-1 to 202-n. This constitution does not requires very fast and expensive processor because of the constitution of the cancellation chip and can use an ordinary signal processor.
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公开(公告)号:JP2001024527A
公开(公告)日:2001-01-26
申请号:JP2000158178
申请日:2000-05-29
Applicant: LUCENT TECHNOLOGIES INC
Inventor: ALLPRESS STEPHEN A , HAHM MARK D
Abstract: PROBLEM TO BE SOLVED: To obtain a general viterbi algorithm and cycle technology capable of providing superior performance to that of a conventional list viterbi decoder reducing calculation quantity to a level less than that of the general viterbi algorithm and simplifying circuit constitution. SOLUTION: The method has a step (A) for decoding the sequence of received symbols in order to generate a maximum likelihood estimation path, a step (B) for checking whether a decoded frame generated from the maximum likelihood estimation path passes a frame quality reference, a step (C) for cyclically tracing back the path generating the decoded frame passing the frame quality reference along the maximum likelihood estimation path until the generation of trace back by deviating the decoded frame generated from the maximum likelihood estimation path from a different stage along the maximum likelihood estimation path when the decoded frame does not pass the frame quality reference, and a step (D) for outputting the decoded frame passing the frame quality reference.
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公开(公告)号:DE60040122D1
公开(公告)日:2008-10-16
申请号:DE60040122
申请日:2000-06-20
Applicant: LUCENT TECHNOLOGIES INC
Inventor: BUEHRER MICHAEL R , HAHM MARK D , LIU SHANG-CHIEH , NICOLOSO STEVEN P
Abstract: The base station system includes a cancellation processor connected to a plurality of conventional signal processors. Under the control of a controller, the signal processors acquire user signals in signals received by the base station antennas. The controller controls the cancellation processor to perform cancellation operations with respect to the acquired user signals. The cancellation processor includes first-nth filter stages. Each filter stage operates in the same manner. A filter stage obtains, in parallel, the acquired user signals from signals supplied thereto by estimating symbols in the acquired user signals under the control of the controller. The cancellation processor also includes a cancellation stage associated with each filter stage. Each cancellation stage cancels, in parallel, the obtained user signals output from the associated filter stage from the signals received by the base station antennas. The resulting residual signals output from a cancellation stage are supplied to the next filter stage, and the signals supplied to the first filter stage are the signals received by the base station antennas. A cancellation stage cancels the obtained user signals received thereby from the received signals at a substantially same time with respect to the received signals.
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