公开(公告)号：JPH1041248A

公开(公告)日：1998-02-13

申请号：JP10798997

申请日：1997-04-25

Applicant: LUCENT TECHNOLOGIES INC

Inventor： CAPPUZZO MARK ANTHONY ,  KANE CASEY FRANCIS ,  SHMULOVICH JOSEPH

IPC: H01L21/28 ,  H01L21/027 ,  H01L21/312 ,  H01L21/3213 ,  H01L21/768

Abstract: PROBLEM TO BE SOLVED: To form a pattern adequately defined on the surface of a semiconductor wafer having grooves by the lithography. SOLUTION: A multilayer metal cover structure 18 is formed on an upper nonplanar surface of a semiconductor wafer 10 by a sequence of specified vacuum evaporation/etching process. By an electrophoretic vacuum evaporation step a resist material layer of an analogously uniform thickness is formed on the upper surface of this structure 18 and patterned by the lithography to form an etching mask to define the layout in the structure 18 of a lower layer.

公开(公告)号：EP0803905A3

公开(公告)日：1997-12-29

申请号：EP97302564

申请日：1997-04-15

Applicant: LUCENT TECHNOLOGIES INC

Inventor： CAPPUZZO MARK ANTHONY ,  SHMULOVICH JOSEPH ,  KANE CASEY FRANCIS

IPC: H01L21/28 ,  H01L21/027 ,  H01L21/312 ,  H01L21/3213 ,  H01L21/768

CPC classification number: H01L21/76838 ,  H01L21/0273 ,  H01L21/312

Abstract: In accordance with a specific deposition/etching sequence, a multi-layer metallization system is formed on the non-planar top surface of a semiconductor wafer. In an electrophoretic deposition step, a conformal uniform-thickness layer of a resist material is then formed on the top surface of the metallization system. In turn, the layer of resist material is lithographically patterned to provide an etch-mask for defining features in the underlying metallization system.