公开(公告)号：JP2000315689A

公开(公告)日：2000-11-14

申请号：JP2000120437

申请日：2000-04-21

Applicant: LUCENT TECHNOLOGIES INC

Inventor： CHITTIPEDDI SAILESH ,  KELLY MICHAEL JAMES

IPC: H01L21/28 ,  H01L21/3205 ,  H01L21/8234 ,  H01L21/8242 ,  H01L21/8244 ,  H01L23/52 ,  H01L27/088 ,  H01L27/108 ,  H01L27/11 ,  H01L29/423 ,  H01L29/43 ,  H01L29/49

Abstract: PROBLEM TO BE SOLVED: To form an economical compact semiconductor circuit, etc., by forming an LDD area, a drain area, etc., by ion implantation after an ion implantation barrier is formed on a polysilicon material and treating the upper surface of the insulating barrier so that the upper surface may be flushed with the upper surface of an insulating layer. SOLUTION: A multilayered dual polysilicon structure 50 is provided with a first insulating layer 12 which has an upper surface 18, is formed on a substrate 10, and is preferably composed of silicon dioxide. In an appropriate embodiment, the upper surface 34 of the substrate 10 is exposed by etching first trenches 14 to thicknesses which are nearly equal to the thickness of the first insulating layer 12. It is ideal to form a second trench 16 after the first trenches 14 are formed in such a way that the trench 16 is shallower than the trenches 14 and has the upper surface 32 of the insulating layer 12 above the upper surface 34 of the substrate 10. The depth of the trench 16 varies depending upon the desired characteristics of an integrated circuit or device which is in the course of manufacture.

公开(公告)号：JP2000124326A

公开(公告)日：2000-04-28

申请号：JP23524099

申请日：1999-08-23

Applicant: LUCENT TECHNOLOGIES INC

Inventor： SEERESHU CHITTIPEDII ,  KELLY MICHAEL JAMES

IPC: H01L23/52 ,  H01L21/265 ,  H01L21/28 ,  H01L21/3205 ,  H01L21/76 ,  H01L21/8234 ,  H01L21/8242 ,  H01L21/8244 ,  H01L27/06 ,  H01L27/088 ,  H01L27/108 ,  H01L27/11

Abstract: PROBLEM TO BE SOLVED: To reduce the manufacturing step number by forming trenches having different depths into a first insulation layer and forming a second insulation layer on the trenches before depositing a polysilicon layer. SOLUTION: A first SiO2 insulation layer 10 having a uniform thickness is formed on a substrate 12, the substrate 12 is etched until its surface is exposed to form first trenches 14, second trenches 20 shallower than the first trenches 14 are formed in the insulation layer 10 and hence have the bottoms on remaining parts of the insulation layer 10, a second thin insulation layer 24 is formed on the bottoms of the first and second trenches 14, 20 at once, an ion implantation barrier layer 30 is deposited to fill the trenches 14, 20 and implanted with ions to form lightly doped diffused regions 32, the annealing process is applied, and the ion implanting and annealing are made again to form source/drain regions 34.