INTEGRATED CIRCUIT
    1.
    发明专利

    公开(公告)号:JP2001177090A

    公开(公告)日:2001-06-29

    申请号:JP2000328522

    申请日:2000-10-27

    Abstract: PROBLEM TO BE SOLVED: To provide a multilayer spacer close to the gate of FET structure. SOLUTION: Multilayer spacers 306 and 307 are provided with a low k material layer 306 for reducing floating capacitance, and a material layer 307 for indicating etching selectivity for a substrate and an insulation oxide. The method allows the overetching of active and insulation regions to be avoided.

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