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公开(公告)号：JPH10190709A
公开(公告)日：1998-07-21
申请号：JP27597997
申请日：1997-10-08
Applicant: LUCENT TECHNOLOGIES INC
Inventor： GABARA THADDEUS JOHN , MORRIS BERNARD LEE
Abstract: PROBLEM TO BE SOLVED: To reduce signal transmission delay between devices without hardly increasing power dissipation. SOLUTION: Impedance elements which can be switched in devices 101-106 connected to a closed loop signal bus 110 are used. The impedance elements selectively operate so that valid terminal impedance is generated in the position of an almost middle point from the connection point of the transmission device along the closed loop bus 110. A signal transmitted by the transmission device is transmitted as a clockwise signal and an anticlockwise signal along the closed loop bus 110. A device connection position to the closed loop bus 110 and the impedance value of the impedance elements which can be switched are selected so that they can selectively operate individually or by combining them in such a way that the elements generate the valid terminal impedance of the position of the almost middle point along the closed loop bus 110.
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公开(公告)号：JPH11355117A
公开(公告)日：1999-12-24
申请号：JP12016899
申请日：1999-04-27
Applicant: LUCENT TECHNOLOGIES INC
IPC: H03K17/08 , H03K19/003 , H03K19/0175
Abstract: PROBLEM TO BE SOLVED: To provide a protection circuit which is proof against high voltage and which does not take out current in a state without power, by forming a circuit of a second P channel device whose gate is maintained by second reference voltage and a resistor connected between the input of a transmission gate and bus reference voltage, permitting respective voltages to be in a specified relation and turning on the transmission gate while circuit reference voltage exists. SOLUTION: When a circuit reference voltage is VDD, a bus reference voltage is PAD and a first reference voltage is VDD2, they are set to be PAD
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公开(公告)号：JPH10190420A
公开(公告)日：1998-07-21
申请号：JP29972397
申请日：1997-10-31
Applicant: LUCENT TECHNOLOGIES INC
Inventor： FISHER JONATHAN HERMAN , MORRIS BERNARD LEE
Abstract: PROBLEM TO BE SOLVED: To provide a large common mode range by operating a first comparator when a first input signal and a second input signal are higher than a prescribed level, operating a second comparator when they are lower and selecting the output of the operated comparator. SOLUTION: The first comparator 301 uses an (n) channel input device and the second comparator 302 uses a (p) channel input device. A circuit composed of buffers 303 and 304, a NAND 305 and an INV 306 generates selection signals in response to the size of a signal level in comparator input, controls a selection circuit composed of M1, M2, M3 and M4, selects the output of the first comparator or the second comparator and outputs comparator output Z. The selection signals are supplied to the comparators 301 and 302 also as EN signals and the power of the comparator on a non-selected side is brought down. Thus, a differential comparator capable of performing coping at the optional part of a wide rail-to-rail range respectively operated over the different ranges of the signal level is realized.
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Patent Agency Ranking
公开(公告)号：JP2000029551A
公开(公告)日：2000-01-28
申请号：JP12017099
申请日：1999-04-27
Applicant: LUCENT TECHNOLOGIES INC
IPC: G05F3/24 , H03K17/08 , H03K19/003
Abstract: PROBLEM TO BE SOLVED: To provide a CMOS output buffer protecting circuit which can be formed using the CMOS technique of a low voltage of 3.3 V, but is durable against a high voltage of 5 V and does not take out any current in the state of impressing no power (namely, in the state of no existence of VDD). SOLUTION: This CMOS circuit has a first P channel device 22 whose source is connected to a VDD and a first N channel device 24 whose gate is connected to the VDD. The drain of this N channel device 24 is used as the gate input of the P channel device 22 and the source of the N channel device 24 is connected to a VSS. A diode connection is applied between a pair of N channel devices 30 and 32 and these devices are serially connected between the drain of the P channel device 22 and a signal bus rail (PAD).
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公开(公告)号：JPH11355118A
公开(公告)日：1999-12-24
申请号：JP12016999
申请日：1999-04-27
Applicant: LUCENT TECHNOLOGIES INC
IPC: H03K17/08 , H03K19/003 , H03K19/0175
Abstract: PROBLEM TO BE SOLVED: To prevent high voltage from being given to any device by giving voltage VDD2 equal to reference potential VDD while it exists, permitting VDD2 to maintain the prescribed voltage of not more than PAD in PAD and controlling a driving stage through the use of an inverter biased by voltage between intermediate reference potential VL3 and VDD2. SOLUTION: A pair of N channel devices 72 and 74 are connected between a voltage level VL3 and the gate of a P channel device 54 in series. The gate of the N channel device 72 is maintained to VDD and the gate of the N channel device 74 is maintained to VDD2. In a regular state, VDD2=VDD and both devices are in on-states. Reference voltage TUB1 is equal to VDD5 and it is applied to the gate voltage of a P channel device 76. While VDD5 exists, the device 76 is in an off-state and the device 54 prevents voltage appearing in a regular state node C from becoming not more than (VL3+Vtp).
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公开(公告)号：JPH11355116A
公开(公告)日：1999-12-24
申请号：JP12016799
申请日：1999-04-27
Applicant: LUCENT TECHNOLOGIES INC
IPC: H03K17/08 , H03K19/003 , H03K19/0175
Abstract: PROBLEM TO BE SOLVED: To provide a CMOS output buffer protecting circuit which resists a high voltage 5 V, is formed by a low voltage 3.3.V COMS technique and does not take out a current in a state where power is not added (that is, the state is called as the 'hot plugable' state where VDD (a previously know reference voltage) does not exist). SOLUTION: In the protecting circuit, a reference voltage input (VDD2) is given to the CMOS output buffer protecting circuit through the use of a reference voltage generator and the both of a power source voltage VDD and a signal bus voltage (PAD) exist as an input. The reference voltage generator gives an output VDD2 being equal to VDD during the presence of VDD and keeps VDD2 to be a prescribe voltage being equal to below a PAD voltage unless VDD exists.
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公开(公告)号：DE69733392D1
公开(公告)日：2005-07-07
申请号：DE69733392
申请日：1997-09-30
Applicant: LUCENT TECHNOLOGIES INC
Inventor： GABARA THADDEUS JOHN , MORRIS BERNARD LEE
Abstract: A communication system (100) having communicating devices (101-106) coupled to a closed loop bus (110) substantially reduces interconnect distances and corresponding signal propagation delays between the devices. Particular devices possess switchable impedance elements that can be selectively actuated to produce an effective terminating impedance substantially at a midpoint position along the closed loop from the coupling point of a transmission device. In such an arrangement, the produced effective terminating impedance would cause the signal transmitted by the transmission device to propagate to a destination device substantially without signal degradation due to signal reflections.
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公开(公告)号：DE69733392T2
公开(公告)日：2006-04-27
申请号：DE69733392
申请日：1997-09-30
Applicant: LUCENT TECHNOLOGIES INC
Inventor： GABARA THADDEUS JOHN , MORRIS BERNARD LEE
Abstract: A communication system (100) having communicating devices (101-106) coupled to a closed loop bus (110) substantially reduces interconnect distances and corresponding signal propagation delays between the devices. Particular devices possess switchable impedance elements that can be selectively actuated to produce an effective terminating impedance substantially at a midpoint position along the closed loop from the coupling point of a transmission device. In such an arrangement, the produced effective terminating impedance would cause the signal transmitted by the transmission device to propagate to a destination device substantially without signal degradation due to signal reflections.
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