公开(公告)号：JPH10303303A

公开(公告)日：1998-11-13

申请号：JP10638298

申请日：1998-04-16

Applicant: LUCENT TECHNOLOGIES INC

Inventor： RICHARD W GREGER ,  KIZILYALLI ISIK C ,  RANBIA SHIN

IPC: H01L21/82 ,  H01L21/28 ,  H01L21/8247 ,  H01L29/423 ,  H01L29/49 ,  H01L29/51 ,  H01L29/788 ,  H01L29/792

Abstract: PROBLEM TO BE SOLVED: To manufacture a new element wherein no secular change in efficiency which a passivated device has is comprised, by forming a dielectrics layer, on a substrate, comprising a hydrogen isotope of significant concentration, and forming a control gate on the dielectrics layer. SOLUTION: Relating to a semiconductor device 10, a source region 14 and a drain region 16 are formed in a substrate 12, and under the presence of a hydrogen isotope vapor, thermalgrowth is performed to form an oxide layer 18. Then, on the oxide layer 18, a polysilicon layer 22 is deposited, doped, and etched to form a gate 20. On the polysilicon layer 22 of the gate 20, a dielectrics layer 26 is formed, on which a control gate 28 is formed. Thus, such new element as indicates no secular change in efficiency which a passivated device indicates can be manufactured.

公开(公告)号：JP2000208651A

公开(公告)日：2000-07-28

申请号：JP2000003633

申请日：2000-01-12

Applicant: LUCENT TECHNOLOGIES INC

Inventor： PATRICK J KELLY ,  LEUNG CHUNG W ,  RANBIA SHIN

IPC: H01L21/8247 ,  H01L21/28 ,  H01L21/336 ,  H01L27/115 ,  H01L29/423 ,  H01L29/788 ,  H01L29/792

Abstract: PROBLEM TO BE SOLVED: To operate a split gate cell at a low voltage by forming a conductive layer on a tunnel oxide on a silicon substrate surface, with a space provided in the conductive layer, and forming a heavily-doped region in the substrate under the space between electrodes, so that a second control gate is formed on a dielectric layer. SOLUTION: A split gate cell has a tunnel oxide layer in a part of the surface of a silicon substrate with a space provided between them. On the tunnel oxide layer, a first control gate CG-1 and floating gate electrode FG of the same deposit or growth layer are formed. A dielectric layer is stacked over the first control gate CG-1 and floating gate electrode FG. A second control gate CG-2 which is physically separated from the first control gate CG-1, is provided in the space between the first control gate CG-1 and the floating gate electrode FG on the dielectric layer, forming a heavily-doped region, so that low-voltage operation is allowed.

公开(公告)号：JP2000208650A

公开(公告)日：2000-07-28

申请号：JP2000003626

申请日：2000-01-12

Applicant: LUCENT TECHNOLOGIES INC

Inventor： PATRICK J KELLY ,  LEUNG CHUNG W ,  RANBIA SHIN

IPC: H01L21/8247 ,  H01L21/336 ,  H01L27/115 ,  H01L29/423 ,  H01L29/788 ,  H01L29/792

Abstract: PROBLEM TO BE SOLVED: To provide a split gate memory cell which is useful for low-voltage operation by forming control gate and floating gate electrodes of the same deposit or growth layer, while a tunnel oxide layer is formed on the surface of a silicon substrate, on which a conductive layer is formed, separated from each other. SOLUTION: A tunnel oxide layer 12 is formed on a silicon substrate 14. A first conductive layer is formed on the tunnel oxide layer 12. Then the conductive layer is etched to form a trench, forming a dielectric layer 20 at an exposed surface part. On the dielectric layer 20, a second conductive layer 22 which is to be a second control/gate electrode is deposited. Thus, a space is provided between conductive layers 16, with one layer constituting a first gate electrode, so that the other layer is split into two different layers to be a floating gate electrode of a device. Thus, a split gate memory cell device useful for low- voltage operation is manufactured.